ADS1282EVM-PDK: SYNC COMMAND

Hi Viviana,

Welcome to the TI E2E Forums!

Unfortunately, the current ADCPro software for the ADS1282EVM does not give direct access to the device registers. For the most part the controls in the GUI are tied to specific fields, but there may be cases where not all fields are accessible or where the GUI may automatically set certain register bits. We are working on releasing an update to this EVM and software later this year and the new software will allow for low-level register programming.

I believe you are correct, the ADS1282EVM GUI doesn't give any control to issue a SYNC command or modify how data is read. If I recall correctly, the data is always read in RDATAC mode. The SYNC command is useful when trying to synchronize multiple ADS1282's, but this functionality isn't really demonstrated by the EVM.

Regarding your question...

Viviana Nurra said:

I'm going to implement on FPGA a driver to control only one ADC, but I need to trigger the start of the acquisition on a particular event; so, I was planning to drive the SYNC pin or send the SYNC command, to start a new acquisition. Do I have to send also the RDATA command after the SYNC, or the /DRDY signal will be asserted as soon as a new data is available after the syncronization process and the data can be shifted out?

Since I'm going to use both analog input channels, I'll set the internal mux by means of CONFIG1 register. Does this write access restart the ADC acquisition so I do not need to use the SYNC command after that, but only the RDATA command?  I'm confused about the RDATA command, since I do not understand if it's just a command to transfer the acquired data on the output buffer to be shifted out, or if it start a new acquisition proccess as well.

Do you have suggestion on wich command sequence should I use?

If you are planning on only reading one sample and then switching channels, I would probably use the RDATA command (I call this "SDATAC" mode).

If you plan to read multiple samples continuously from one channel for a while, then I would recommend using RDATAC mode.

The SDATAC mode and RDATAC modes control the behavior of the DOUT pin...

• In SDATAC mode (note: this is the default mode after reset) you have to send a command to the device to tell it what data you want to read on DOUT. So for example, when you send a RREG command, you are telling the device to load the value of a specific register address into an output shift register so that you can read it. To read the ADC data in this mode, you have to send the RDATA command, prior to the /DRDY falling edge, to tell the device to load the conversion result into the output shift register once it is available.
  
  
• In RDATAC mode, the device automatically updates the output shift register (that holds the DOUT data) with the ADC conversion result as soon as it is available. In this mode, sending SCLKs immediately after a /DRDY falling edge will allow you to retrieve the data (no RDATA command necessary). However, you will not be able to read register data in this mode (to read registers you would first need to exit this mode by sending an SDATAC command).

Depending on which mode you want to use, you would 1a) first configure the device (by sending WREG commands). 1b) If you need to synchronize multiple ADS1282's then you could issue a SYNC GPIO pulse to all devices at once; however, if you do not need to synchronize multiple device then this step is not necessary (writing to the registers will automatically restart the conversion process, making the SYNC command redundant). 2) Next, you would issue either a RDATA command OR an RDATAC command. 3) Then you would wait for /DRDY to go low. 4) After a /DRDY falling edge you would send four "0x00" bytes to clock out the data. 5) Finally, at this point you could re-configure the device (go back to step 1a) or allow the device to continuously convert. If you decide to allow the device to continuously convert, then for RDATAC mode you wouldn't need to do anything (go back to step 3), however for SDATAC mode 6) you would need to issue an RDATA command here (right after reading data in step 5) and then go back to step 3.

NOTE: Do pay attention to the long settling time of the FIR filter. If you plan to switch between channels often then you might consider using the SINC filter which settles much faster. When beginning a new conversion (after writing to the device registers), the /DRDY signal will not go low until the digital filter has settled (i.e. the first conversion result will be significantly delayed). After the first conversion result completes, the following conversion results will complete at the expected data rate period (1/fDATA).

Best regards,
Chris