The datasheet does not specify timing parameters for DRDY relative to either SCLK or CLK. Is DRDY synchronous to either clock? What is the min/max propagation delay for DRDY relative to (which) clock?
I'm wondering how to safely capture DRDY in to my ADC interface under all conditions. Should I register DRDY on CLK or SCLK? Or should I consider it asynchronous and double-register it?