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ADS1255: About DRDY periods

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Replies: 5

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Part Number: ADS1255

Hi Team,

Please help me answer the follow question from my customer, thank you so much.

How long(what sec) is the DRDY periods under the following conditions?
The main fCLKIn is 7.68MHz.
Sampling is 15kHz.

Best Regards,
Tom Liu

  • Hi Tom,

    The /DRDY period (time between /DRDY falling edges) should correspond with the Data Rate. Therefore, at 15 kSPS, the /DRDY periods will be 1/15k = 66.667 us.

    However, note that the time to the first /DRDY falling edge will be slower, according to the settling time shown in Table 13 of the ADS1255 datasheet. For the 15 kSPS data rate, the first /DRDY will occur at 250 us after a new conversion. The reason for this is that the SINC5 digital filter is a type of moving average filter that must accumulate multiple samples before it can calculate an average result.

    Best regards,
    Chris Hall
    Applications Engineer | Precision ADCs


    Check out these helpful resources...
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  • In reply to Christopher Hall:

    Hi Hall,

    Thank you for your answer very much. My customer rose a further question and could you please see it?

    I consider the DRDY periods as below figure(the Japanese means conversion time),
    How long is the conversion time?
    If you have a Equation for conversion time, please let me know.

    【Conditions】
    The main fCLKIn is 7.68MHz.
    Sampling is 15kHz.
    Differential input using AIN0 and AIN1.
    No Channel switch.

    Best Regards,
    Tom Liu

  • In reply to Liu Yang:

    Hi Tom,

    The time between ADC conversions will be most consistently described by the time between falling edges, for two reasons:

    1. /DRDY is an active low signal, so the falling edge is what indicates that a conversion has completed.

    2. The rising edge of /DRDY is dependent on the SPI communication, as /DRDY only goes high after all the data has been read, or prior to the end of a conversion if data has not been read. See Figure 4 in the datasheet.

    If the ADS1255 is continuously converting, then the time between /DRDY falling edges will be the period of the data rate.

    However, if the ADC is MUXing or if the conversion is restarted, then the time for the first conversion (or next conversion after switching channels or restarting) will be given by Table 13. The first conversion result is always delayed because the digital filter is averaging multiple conversions and needs to collect multiple samples before it can provide a "settled" conversion result.

    Best regards,
    Chris Hall
    Applications Engineer | Precision ADCs


    Check out these helpful resources...
    TI Precision Data Converters | TI Precision Labs - ADCs | Analog Engineer's Calculator | Data Converters Learning Center | Selection Guide

     

  • In reply to Christopher Hall:

    Hi Hall,

    Because I don't understand your answer very well, please allow me to confirm it again.

    Is /DRDY periods the time between the two rising or falling edges as shown in the figure attached?
    Which part of the graph is SETTLING TIME?
    How long is the conversion time (/DRDY High level duration), or the length is uncertain? in my opinion,while Continuously Converting, its length should be a certain value.

    I'm sorry to disturb you again.

    Best Regards,
    Tom Liu

  • In reply to Liu Yang:

    Hi Tom,

    The /DRDY falling edge signals that a conversion is complete; therefore, use the period between the /DRDY falling edges to determine the data rate.

    Settling time is how long it takes the digital filter to output a "settled result" when starting a new conversion OR when an input step change occurs. When starting a new conversion, you'll notice that the time it takes for the first /DRDY falling edge to occur will be longer than a typical conversion period.

    The settling time is due to the fact that the digital filter is a kind of moving average filter that needs to collect multiple samples before the moving average has settled.

    • When you start a new conversion with the ADS1255, the first /DRDY falling edge will be delayed so that you do not read unsettled data.
       
    • However, if the ADC is continuously converting and and input step change occurs on the input signal, then it may take  multiple conversion periods (up to 6 at the higher data rates) for the digital filter to compute a "settled" moving averaged output code.
       

    Best regards,
    Chris Hall
    Applications Engineer | Precision ADCs


    Check out these helpful resources...
    TI Precision Data Converters | TI Precision Labs - ADCs | Analog Engineer's Calculator | Data Converters Learning Center | Selection Guide