Initial setup for an ADS4226EVM board

Hi,

One thing missing from your description of the setup that i would like to verify first would be reset.  Before doing any of the register writes with the SPI GUI, either reset the device with the reset bit in the register space or with pushbutton SW1.  I presume also since you are using the SPI GUI that you have moved jumpers JP8, JP9, JP10, JP11 to position 2-3  for serial SPI configuration.

Our EVMs are tested before they are stocked for order fulfilment.  If there is a serial number on the EVM and it was purchased through the TI store, then it has been tested and we will have a saved FFT plot from when that EVM was tested.

You *will* need a clock input to the EVM - a sample clock is to be input to the SMA J19.  The sample rate is of your own choosing.  You've chosen a device that can sample up to 160Msps.   If you wish for your 20MHz input signal to reside in the first Nyquist zone then you would want a sample clock greater than 40MHz.  160MHz for the sample clock would work well.

Hmmm, you mention you wish to see the output on J1.  That is the header posts for CMOS output data.  By default, the EVM is set up for LVDS operation and the sample data will appear on connector J8.  In order to get data present on J1, there is soldering involved.  The LVDS data bits are routed to J8 through the surface mount resistor packs RN5 through RN12.  To get CMOS data at connector J1 you will need to remove the resistor packs and instead solder down buffer driver devices SN72AVC16245 to U12 and U13.  The resistor packs for the LVDS and the buffers for the CMOS occupy the same space on the circuit board so that only one can be installed at a time.

You've also mentioned that your input signal is 1V rms.  The peak to peak full scale range of the data converter is 2V, so your sine wave will be clipped at the top and at the bottom somewhat.  There will be a dB or so of loss through the transformer coupling, but that will not be enough i think to cut a 1V rms input down to less than 2V peak to peak.

Regards,

Richard P.

Thanks for the reply.

I do not want to be involved in soldering matters of the digital domain circuits since there have been already full of soldering and drawing schematic matters in the RF domain.

In digital domain, I just want to verify an algorithm with ready-made products.

After several trials and errors with FPGA, I found that the learning from the beginning cannot lead the project to be finished. Especially, handling serialization and deserialization, FIFO, interfacing have not been took into account.

If I had enough time, I would tried it thoroughly but I have to design both RF block and software part simultaneously.

There are two possible solutions:

1. A DSP solution using TSM320C6416 and XDS560 PCI emulator is one thing. However, this has a big problem, which I have to interface high speed ADC and its peripheral circuitry again. I've tried to use XDS560 PCI emulator with XP machine but the CCSv5 was not installed correctly. I finally install the CCSv5 on my computer but the basic example of Helloworld did not work.
2. Buying TSW1200 and do serial communication through one of computer languages. I think this solve my problems as soon as possible.

Regards,

Lim, Euncheon