Deserializer for ADS6442 virtex6

Hi,

We do not have reference code for ML605. 

What we have been supplying when requested is the source code for the TSW1200, which was written in Verilog and targeted for a Virtex4.  And of course the constraint file would be different because of the different FPGA package and different pin assignments.  The source code for the TSW1200 was not written for public release, as it was not commented and documented for public support.  And because the TSW1200 code was written to support so many different EVM types the code is more complicated than it would need to be for a single targeted interface type.  A more simplified representation of how the TSW1200 does implement the interface to the ADS644x family has been posted before - as in the link http://e2e.ti.com/support/data_converters/high_speed_data_converters/f/68/t/47555.aspx.   I would post that sketch again here but the forum seems to have an error today when attaching files or images.

Regards,

Richard P.

Hi Richard,

I have not found the code in that thread..

Can u send the verilog code TSW1200 for ADS644X..

here is my mail id ashokkumar001@gmail.com

Hi Richard,

we are trying to interface between ads644x and xilinx virtex6

we  need  the verilog code TSW1200 for ADS644X..

Please help us.

thanks

email : hikang92@hanmail.net

Sent to the address provided.

Regards,

Richard P.

Hi Richard,

Can u send the verilog code TSW1200 for ADS644X. I'm trying to connect  ZC702 board with ADC LTM9011 

here is my mail  kostyameskhidze@gmail.com

best regards

Hello Kostya,

Unfortunately we cannot support you in this instance. We would recommend you reach out to the product suppliers for your design for their assistance, particularly Xilinx, for the Verilog code for latching in serial LVDS data.

Regards,

Chuck