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ADS7883 Evaluation board

Prodigy 70 points

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Hi,

we are testing with the ADS7883 ADC evaluation board, sampling a digital pulse. We are trying to measure the pulse amplitude of  a 250 ns wide pulse. The signals into the AD7883 eval board are single-ended +5V levels. The max clock rate is around 5 Mhz. If the CS goes low 150 ns into the pulse will the converter accurately capture the pulse amplitude? Is the track and hold function dependent upon the input SCLK speed, or is it based upon when the CS goes low?

thanks

  • Hi Stan,

    The track and hold function depends on /CS as well as the frequency of SCLK. The falling edge of /CS actually marks the end of the ADC's sampling phase. After this point the ADC goes into hold mode and starts converting the sampled analog input. The ADC uses SCLK to convert, so the frequency of SCLK determines the conversion time, which ends on the 13th rising edge of SCLK (after the /CS H->L transition). After this point the ADC enters the sampling phase until /CS goes low once again. So to answer your question the falling edge of /CS determines when conversion begins (or sampling ends) and the frequency of SCLK determines conversion time as well as when the next sampling phase can begin. In your case, as long as the ADC input has settled, the ADC should provide an accurate conversion result.

    Thanks,
    Harsha


    Harsha Munikoti

    Product Applications, TI Current & Magnetic Sensing Products

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