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ADS42JB69 SYSREF and SYNC~

Moon Mars
Prodigy 70 points
Other Parts Discussed in Thread: ADS42JB69, LMK04828, ADS42JB69EVM

Hi,

  I'm trying to use ADS42JB69, and I find the electrical characteristic of SYSREF_P/M and SYNC~P/M is;

          High-level input voltage is typically 1.3V;

          Low-level input voltage is typically 0.5V;

          Input common-mode voltage is typically 0.9V.

  Since LVDS and LVPECL is not suitable for above, I wonder what the signal format is in ADS42JB69EVM, which is derived form LMK04828? 

  • 0
    TI__Guru* 91947 points

    Moon,

    The LMK04828 is driving SYSREF using LVDS. The FPGA provides the SYNC signal, and also driving this as a LVDS level signal.  The board uses pull up and pull down termination resistors 

    To set Vcm to 0.9V, 

      3.3*R2/(R1+R2) = 0.9                  (1)

    For 50Ω termination

      R1*R2/(R1+R2) = 50                   (2)

    Solving equation (1) & (2), yields

             R1 = 183.3Ω &  R2 = 68.75Ω

    Regards,

    Jim