ADS5483 saturation detection

Hi,

This device did not get an output for an over-range indicator when it was defined and designed.    You would have to put logic in the FPGA to look for output codes that match the minimum sample (0000 0000 0000 0000) or the maximum sample (1111 1111 1111 1110 for this device, I believe).

Regards,

Richard P.

Hello Richard,

Thank you for the prompt replys.  Regarding the minimum sample and max sample you've mentioned above I take it that these two values should not occur when the ADC is not overdriven to saturation.  Then, I can use these as qualifiers to catch the saturation condition?  So probably if within a certain number of consecutive samples if I have either of those codes occur I'm guaranteed that the frame is indicating ADC saturation.

Is there another way that people can detect ADC saturation? 

I'm pushing the ADC samples into a fifo and then reading the fifo samples and pushing the read data into a module that converts it to a 2's complement format.  Afterwards I take the fft of the data.

Thanks,

Peter

Hi,

These minimum adn maximum samples could very well be valid, so if you were to do a comparison to see if the sample = the min value or the max value then the result would have to be considered as a 'greater than or equal to overrange', and not just 'greater than'.

But I don't have a better suggestion.  Looking for two or more samples at max or min would only work if you know you have a low frequency input.  High frequency input could well produce an overrange sample for a single sample.  But if you do know that the input bandwidth is low relative to Nyquist then two or more samples at max or min would have to be overrange.

I don't have a better suggestion. 

Regards,

Richard P