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Hi Could you tell me when ADC change mode from Hold mode to Track mode? I think that ADC change from Hold mode to Track mode at 16th sclk of 16 sclk cycles.
I use ADC by the following setting. - Sclk=3.3MHz - CS become High level after 16th clk. - length of CS high level is 20us~30us
In the above setting, I had issue. Issue is that convert value is changed by previous IN value. EX. Previous:IN1= 0.251V Next IN2 = 2.562V Previous:IN1= 2.489V Next IN2 = 2.578V I think that this cause is the memory effect. But I changed CS time from "20us~30us" to "10ms". Then This issue was improved. EX. Previous:IN1= 0.246V Next IN2 = 2.571V Previous:IN1= 2.489V Next IN2 = 2.572V
From this check, I think that ADC change from Hold mode to Track mode at 16th sclk of 16 sclk cycles. I think long track mode is improved the memory effect.
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In reply to masahiko shimizu:
In reply to Andreas Kraemer:
Thank you for your support.
I want to know that When does the ADC104S051 change from HOLD to Track mode?
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