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ADS8507 Input sequence Vana, Vdig and external REF

Other Parts Discussed in Thread: ADS8507

Hi

I have a question about input sequence Vana, Vdig and external REF.
Is there the rules of input sequence Vana, vdig and external REF?

Best regards
Shimizu

  • Hi Shimizu,

    The REF input must not exceed VANA.  The datasheet recommends to connect the digital supply (VDIG) directly to the analog supply  (VANA pin27).  Per the datasheet note on p5, VDIG voltage must be kept less or equat to VANA.  The digital inputs (DATACLK, RC, PWRD, SB/BTC) must not exceed VDIG.

    Connect VDIG and VANA together.  If VDIG is driven separately, the recommendation is to power-up VANA first and then VDIG.

    Ensure REF is not turned on prior the analog supply (VANA).  Similarly, ensure that the digital I/Os are not forced high prior VDIG supply power-up.  Per the Absolute Maximum Ratings table, the REF pin must not exceed VANA by more than 0.3V.  The digital inputs must not exceed VDIG by more than 0.3V.

    Thank you and Best Regards,

    Luis 

     

  • Hi Luis,

    I'm sorry. I add a question.

    "If VDIG is driven separately, the recommendation is to power-up VANA first and then VDIG."
    -> How long should ADS8507 have a waiting time between power-up VANA and VDIG?

    Thanks
    Shimizu

  • Hi Shimizu,

    The datasheet recommends to connect VDIG and VANA directly.  It also mentions that VDIG<=VANA.  There is a potential for the internal ESD circuitry to turn on if VDIG exceeds VANA  by more than +0.3V. 

    Therefore, if the supplies need to be driven separately, allowing VANA to turn on prior VDIG will help prevent a condition where VDIG exceeds VANA.  The required delay is going to be dependent on the ramp rate of the VANA and VDIG supplies in the system.  Placing a diode between VDIG and VANA may also help prevent a condition where VDIG exceeds VANA.

    Thank you and Best Regards,

    Luis