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ADS61B29 Test Pattern Mode

Prodigy 140 points

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Hi,

When I configure ADS61B29 in Test pattern mode with "Outputs Toggle Pattern" , I'm getting first sample as 0xAAA and second sample as 0x555. The order is changing from capture to capture. What is the expected output? How the outputs are coming with respect to ADS61B29 .

And When I use custom pattern by changing Serial registers, D0 and D1 values written into 0x51 serial register is lost ? Is this expected ?

  • Hi,

    yes, the toggle pattern is alternating 0xAAA and 0x555.   That is, 1010 1010 1010 and 0101 0101 0101.  That way every bit is toggling on every sample, but also the bits within each sample are not just all 1 or all 0.  Sometimes this is also called a checkerboard pattern.  If you are using our TSW1400 or similar capture card to capture a buffer of data, the start of the capture in our capture tools is asynchronous to the sample clock so the capture might start with AAA or it might start with 555.

    Since the ADS61B29 is a 12 bit device, and the customer pattern in the SPI register map is defined as 14 bit to also support the 14 bit ADS61B49, it would make sense that the two least significant bits of the custom pattern would be dropped.

    Regards,

    Richard P.

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