Dear TI staff,
I want to know how to output the maximum frequency and minimum of the DAC7821.
It only comprises input latch, DAC register and 12-bits R-2R without external clock.
I can’t understand the operation.
Please explain in detail.
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Dear TI staff,
I want to know how to output the maximum frequency and minimum of the DAC7821.
It only comprises input latch, DAC register and 12-bits R-2R without external clock.
I can’t understand the operation.
Please explain in detail.
Hi Sunryoul,
Do you mean the max and min frequency for the parallel interface or to generate a signal?
For the digital interface you can have up to 20.4 MSPS, however the output is more limited than that.
The output signal is limited by the settling time which includes the delay time between the latch time and the output update. The settlement time for this device is 0.2 μs or 5 MHz update frequency. You can write the the DAC output faster than this, but the DC accuracy will not be settled until 0.2 μs after.