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From Datashet on ADS5409 , Setup and Hold time, is 230 ps. This means that valid data window is 460 ps?
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In reply to jim s:
In reply to Eugene Volkov:
The numbers specified in the data sheet are with the LVDS strength at the default value, which is 3.5mA. I am looking into your other question.
Minimum setup and hold time spec will cover all possible cases of switching (analog input or ramp or all outputs toggling).
In reply to Jakub Niemczyk:
when the decimation filter is enabled, the data rate of the sample bus will be half, so the clock period of the sample clock will be longer. The data valid window will be longer as well, but I do not see characterization data for how much longer the data valid window will be. The extra time of the longer clock period will add to the data valid window, but I do not know if all of the longer clock period will add to setup, or add to hold, or add half of that extra time to each of setup and hold. If possible, I think it safest to continue to use the specified 230ps of guaranteed setup time and 230ps of guaranteed hold time.
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