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i expan a 10ns pulse to 1uS using a simple RC circuit
my application tries to measure a 1uS wide capacitive discharging curve amplitude immediately after occurance of pulse
input Range : 0-2.5V
i wanted to use a simplest ADC with immediate parallel outputs so i have stopped at ADC08L060, up on a edge detection i would immediately take the pulse amplitude of the discharging curve, any how the input takes 500ns to come to half the amplitude in this i want to measure amplitude approximately
my doubt is how to configure the ADC for measuring the full scale range of 0-2.5V, i have seen the ADC being biased using 3V source, what is the best way to use this for measuring digital equivalent of signal varying 0-2.5V
i see the datasheet saying range of ADC is between VRT and VRB, VRT can be max VA which is 3V, and VRB can be minimum VRT-0.5, so i feel i can easily measure 0-2.5V with this, can i do small changes of connecting VRT to 3V and VRB to GND in fig30 of datasheet ?
should i have to take care of any protection at inputs
kindly suggest me the Value of VRT and VRM and VRB to be maintained to cover this range, or should i have to half the voltage before and i have to dc shift above the reference voltage and then only can i measure ?
Thanks & Regards
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In reply to Shyam:
here below is the schematic i am trying to attempt, kindly point out if any flaws, also please let me know what is the L1 value to be used
Setting VRT to 2.5V and VRB to 0V should work OK. Please confirm the value of C37. It is cut off in your schematic above.
I would recommend adding a small value capacitor (22pf to 100pf) in parallel with R40 in your circuit. This capacitor can be adjusted to fine tune the ADC input response to get best performance given your sampling rate and input signal frequency. As discussed in the ADC08L060 datasheet, this capacitor is used to filter the clock rate energy that comes out of the ADC analog input due to the unbuffered input sampling circuit operation.
In reply to Jim Brinkhurst1:
C37 is as given in datasheet only, its 10uF electrolytic, is it compulsory i have to go for a electrolytic ?
anyways my input is a 1uS discharging pulse which occurs at repetition of 20uS
do i really need a input capacitor ? at the input you want me to filter input for better response ? , by the way my input comes from a MUX before, should consider any other additions to the circuit ?
It doesn't need to be an electrolytic capacitor. It is just there to stabilize the top of the reference ladder.
The ADC input SHA is presented as a variable capacitance alternating between 3 and 4 pF as the CLK switches. Each time the sampling switch closes, the input signal is connected to a capacitor that is at a different voltage than the input. This causes some charge injection back to the driving circuitry. The small external capacitor is to help compensate for this effect.
The MUX may be OK, it depends on the impedance of the signal source at the input of the MUX, and the insertion resistance of the MUX itself. If the net source impedance is high it will take longer for the ADC input SHA to settle each time the switch closes. If the ADC is clocked at 60 MHz, then the sampling capacitor only has 16.7 ns to settle fully.
If your signal is 0V to 2.5V then the resistor divider should not be required. I would keep both resistors in the design, but leave the resistor to ground uninstalled. Then if you do need the divider for another signal case you can put the resistor in.
VRT is the full scale reference. As written in the ADC08DL060 datasheet functional description "The analog input signal that is within the voltage range set by VRT and VRB is digitized to eight bits. Input voltages below VRB will cause the output word to consist of all zeroes. Input voltages above VRT will cause the output word to consist of all ones."
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