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ads4229 serial configuration is not working.

Kenneth Lo
Prodigy 50 points
Other Parts Discussed in Thread: ADS4229

I am interfacing to the ADS4229 with a Xilinx Spartan 6 FPGA. I have implemented a SPI master in the FPGA to configure the ADS4229 registers @ 14.7 Mhz. When trying to read back from the ADS4229 register, the SDOUT line is always "low". Not sure if it is a writing or reading problem?

  • 0
    TI__Guru* 91947 points

    Kenneth,

    Before attempting any SPI writes or reads, did you first either pulse the RESET pin or do a software reset by writing a "1" to bit 1 of register 0x00? After doing this, to enable a read function, you must set bit 0 to a "1" on address 0x00. This must be set back to a "0" to do another write. In the write mode, SDIO is set to a high impedance. Is there a chance this pin is being driven by your FPGA as it should not be low? What is the status of CTRL 1,2,3?

    Regards,

    Jim

  • 0 in reply to jim s
    Prodigy 50 points

    \\Jim,

    Thank you for the reply. The root cause of my communication problem with the ADC turned out to be a bad solder joint on the SDATA pin. After the repair, I now can write to the ADC registers and read back the register from SDOUT. My next step in my FPGA design debugging is to see if ADC sampling data output (DDR mode) is being capture properly by the FPGA for both channel A & B. My plan is to write to ADC register 0x25 and 0x29 with a value of 0x03 (output a toggle pattern). My question is does this test pattern remain until I reset the ADC again?

    Regards,

    Ken

  • 0 in reply to Kenneth Lo
    TI__Guru* 91947 points

    Ken,

    The pattern should continuously run until you select another option or do a reset. You will also have to write a 0x08 to address 0x42 to enable the digital functions inside the ADC. Otherwise, the other writes will be ignored. You also need to write to address 0x2B for CHB, not 0x29 as you mention above.

    Regards,

    Jim

  • 0 in reply to jim s
    Prodigy 50 points
    Jim,

    Per your previous reply, I can now get the ADC to out a test pattern. I am now trying to apply a voltage at the input of the ADC, to test if the ADC is converting the analog to digital count correctly. The ADC datasheet said that VCM should be 0.95 V, but I am seeing 1.17V on my board. I am not sure what this mean, or cause the VCM to be higher than expected?

    Regards,
    Ken
  • 0 in reply to Kenneth Lo
    TI__Guru* 91947 points

    Kenneth,

    Is the VCM pin connected to anything else? Are the device power pins within spec?

    Regards,

    Jim

  • 0 in reply to jim s
    Prodigy 50 points

    Jim,

    The ADC VCM is connected  via R35 (0 ohm) to the AD8138 (differential driver). R163 (0 ohm) is removed. See attach schematic pdf

    Regards,

    Kendebug_ads4229.pdf

  • 0 in reply to Kenneth Lo
    TI__Guru* 91947 points

    Kenneth,

    I could not find a R35 in the schematic you sent. If VCM is connected to anything, disconnect it and measure this output at the ADC. It should be around 0.95V.

    Regards,

    Jim  

  • 0 in reply to Kenneth Lo
    Prodigy 50 points
    Jim,

    My mistake. I meant to said that the VCM from the ADC is connected via R162 to the VOCM of the AD8138 differential driver.


    Regards,
    Ken
  • 0 in reply to Kenneth Lo
    TI__Guru* 91947 points

    Ken,

    What is the level of VCM with this resistor removed?

    Regards,

    Jim