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ADS1274: ADS1274 and Quad SPI

Part Number: ADS1274

Hi to all!

Can I work with ADS1274 and MCU with Quad SPI?

This way:

ADS1274         MCU

DOUT1->>>IO0_QUAD_SPI

DOUT2->>>IO1_QUAD_SPI

DOUT3->>>IO2_QUAD_SPI

DOUT4->>>IO3_QUAD_SPI

I need to get data same time on four channels DOUT1..4. 

Or i can get data from DOUT1 about four input channels(CH1,CH2,CH3,CH4).

  • Hello Oleksandr,

    Thanks for your post!

    The ADS1274 can output data in both ways you've described above. The first method is known as Discrete Data Output Mode. This method uses independent DOUTx pins to output the data from each channel in parallel. All other interface pins will be shared with the MCU in this mode (i.e. SCLK, /DRDY/FSYNC).

    The second method is called Time Domain Multiplexed (TDM). This method outputs all channel data on DOUT1 in series, beginning with Channel 1. You can choose between TDM Fixed Position, which always outputs all channels, or TDM Dynamic Position, which omits powered-down channels from the data stream.

    Best Regards,
  • Is it right connection with using SPI between ADS1274 and MCU, in TDM mode?

  • Hi Oleksandr,

    I've noticed that you have shorted CLK and SCLK together. You can only use the Frame-Sync interface protocol with this configuration, not SPI. Also, the schematic does not show the settings for FORMAT[2:0]. See Table 14 for the Data Output Format setting.

    Best Regards,
  • Hi Ryan!
    FORMAT is [0,0,0]. Im using SPI protocol with TDM mode, and Dynamic data position. So no need to connect SCLK with CLK? Just SCLK(ADS1274) to CLK_SPI pin(MCU), and leave floating CLK(ADS1274)?
  • Hi Oleksandr,

    The ADS1274 requires an external clock input to generate the clock frequency used by the delta-sigma modulator as well as the digital filter. This is referred to as the "master clock input" or CLK. SCLK, on the other hand, is the serial interface clock (connected to your MCU CLK_SPI pin), which is used to shift data into and out of the ADS1274. In SPI protocol, these two clocks are not the same.

    Please refer to pages 26 and 30 of the ADS1274 datasheet for more information about CLK and SCLK. When configuring your CLK and SCLK, you must also keep in mind the SPI Format Timing Specifications described on page 8.

    Best Regards,