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ADS5400EVM: Capture board and Clock Board for ADS5400 EVM

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Part Number: ADS5400EVM

Hi,

I would like you to confirm evaluation environment for ADS5400 EVM.

1. According to user's guide of ADS5400 EVM, TI recommend to use TSW1200 to capture analog data.

   However, when I check this TSW1200 EVM, I could not find production page.

   Is there any recommended EVM ? (I think that TSW1400 can be used instead of TSW1200.)

2. According to user's guide of ADS5400 EVM, user need to input clock from SMA connector.

    However, there is no recommended clock device in this document.

    Could you please tell us which clock EVM is used to evaluate ADS5400 EVM ?

Best regards,

  • Hi,

    The TSW1200 capture card has been made obsolete and has been replaced by the TSW1400 capture card.   The TSW1400 will support that EVM.  And for that matter the smaller TSW1405 will support that ADC EVM with less functionality, such as less memory available for capture depth compared to the TSW1400.

    The most common evaluation setup for seeing the performance of the ADC itself is to provide a clock input that is as close to perfect as possible, such as from a low-jitter low phase noise signal generator through a narrow band bandpass filter into the SMA connection on the ADC EVM.   That is because any data converter will see the available SNR performance be a function of clock jitter.  Simply put, if the clock edge is at the wrong moment in time then the resulting sample will be a wrong value.   As clock jitter increases, signal to noise performance decreases.  The data converter itself has an internal source of clock jitter specified as aperture jitter in the datasheet which sets the best possible performance of the device.  But external clock jitter from the clock source will add to that jitter.  Since the purpose of the EVM is to demonstrate what the ADC is capable of, we design the EVM with an SMA input that can come from a high quality signal source.  Keep in mind that if you use a clock generator EVM then you would be seeing the combined system performance of the clock plus ADC.    That said, I would suggest you ask in the clocking forum for a clocking EVM that is suitable for the frequency you would be planning to use.  

    We do have available from our data converter group the TSW4806 clock generator EVM that utilizes a LMK04806 clock chip, but the TSW4806 is not set up by default to provide a clock of about 1GHz out.   The TSW4806 at present can easily output a 491.52MHz clock from a 122.88 VCXO on the EVM.  You could (with some work) modify the TSW4806 to get a frequency of your own choosing by modifying the clock chip configuration, or swapping out the VCXO for one with a frequency suitable for your needs, or even swapping out the LMK04806 device with a similar LMK device that has an internal VCO suitable for your needs.   For example, the LMK04803 could generate an internal 2GHz clock that could be divided by two to output a 1GHz clock to the ADC, with a 100MHz VCXO on the clocking board.    But at present, 491M is the highest off-the-shelf clock source from our group.   The clocking group would be able to offer many more options I would expect.  You would need a single ended clock output from the clock EVM since our ADC EVM accepts a single ended clock input (not differential.)

    Regards,

    Richard P.

  • In reply to Richard Prentice:

    Hi Richard-san,

    Thank you for your reply.
    I understood that you do not have environment which can estimate 1GHz clock input condtion.
    However, i will ask clock forum about this. thank you for your suggestion.
    (As you said, i think that EVM of LMK04803 can use because vco range is meet in my usecase.)

    Best regards,

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