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ADS1263: Checksum calculation

Part Number: ADS1263

Hi ,

Can someone explain me how is the Checksum working?

Looking at the example in page 72 of the data sheet.

If I XOR the numbers (12h ^ 34h ^ 56h ^ 78h ^ 9Bh) = 93h,  not EBh.

If I add the numbers (12h + 34h + 56h + 78h + 9Bh) = 1AFh and after taking the LS byte it’s AFh – again not EBh

Is it a bug in the example?

 

Thanks

 

  • Hi Ehud,

    Yes, you are correct. This example is wrong in the datasheet... Please refer to this E2E thread from additional information:

    e2e.ti.com/.../450583

    Let me know if you need any other clarification!

    Best regards,
    Chris
  • Thanks Christopher
    I have one more question:
    It says in the data sheet (page 79) that for the auto calibration of ADC1 DRDY goes low when the calibration is complete.
    What causes it to go high again? Do you have to read the offset registers for that?
    Thanks
  • Hi Ehud,

    Good question: Calibration should be performed while using the ADC's continuous conversion mode. While in this mode, /DRDY will remain low until:

    1. An SCLK falling edge occurs (so sending any SPI command will cause /DRDY to return high)

      OR

    2. It will automatically pulse high 16 fCLKs before the next /DRDY falling edge (to indicate that the next conversion has completed).


    Page 67 in the datasheet gives more information about the /DRDY pin behavior. Does that help?

     

    Best regards,
    Chris