TSW1200 configuration

Patrick Bordeaux

Prodigy 60 points

Hello everybody, i have an ADS6422EVM board and a TSW1200.

I would like to test the mode :

-OdB Gain, int ref

-SDR 2 wire

-x12 rising edge

-div by 1

-MSB first, 2s comp

But it seems that the tsw1200 work only in DDR mode. What i have to change to test the SDR mode.

Thanks for your answer.

Patrick

over 13 years ago

0 Richard Prentice over 13 years ago

TI__Mastermind 29220 points

Hi,

The TSW1200 firmware for the FPGA was only written to work with a DDR bit clock. There is no provision with the TSW1200 to use the SDR clock from the EVM. Not every mode of every EVM is supported, although the FPGA would be capable of handling other modes of operation if the Verilog code for the firmware was to be modified appropriately.

Regards,

Richard P.

0 Patrick Bordeaux over 13 years ago in reply to Richard Prentice

Prodigy 60 points

Thank you for the answer.

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TSW1200 configuration