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DC coupling a single ended signal on ADS644x

This is a somewhat unconventional application.  We have a sensor that puts out an analog signal that ranges from 0.8v to 2.8v. We need to digitize the actual voltage, so we can't AC couple with capacitors or transformers.  Using the differential input "as intended" doesn't really seem to work here.

To get the full range of the ADC, it would be best to level-shift the sensor output, subtracting off 0.8v.   That would achieve a 0-to-2 Vpp range.  Ideally, because of space and power restrictions, it would be great to eliminate an opamp by exploiting the differential input of the ADC.

Would it be a good idea to simply put the full range signal into the positive input, put +0.8v dc into the negative input, and get a subtraction that way?  There is nothing in common between the inputs, so what is the best way to treat the Vcm I/O on the ADC?  All channels would have the same 0.8v offset, so would it maybe be better to use Vcm in some way to get the offset?

We have an EVM setup and don't mind hacking it to do experiments, but there's no point in doing something foolish and destroying the DUT.

  • Hi Garry,

    You say that,

    "We have a sensor that puts out an analog signal that ranges from 0.8v to 2.8v. We need to digitize the actual voltage, so we can't AC couple with capacitors or transformers"

    which means that your dynamic range required is 0.8-2.8V (actual voltage digitized).

    But here you say,

    " That would achieve a 0-to-2 Vpp range".

    Could you explain this a bit more clearly?

    One way could be using a three-resistor network to shift the Vcm from the present value to a lower value, using resistor-divider network, such that Vcm_present = Voltage between R1 and R2. and Vcm_required = Voltage between R2 and R3. Or you can use the capacitor to remove Vcm (DC voltage) completely and add a voltage reference circuit of high precision (0.01% resistors) to generate the new Vcm of 1V (0 to 2 Vpp) over which your analog signal will override. All this is done before the input is given to the ADC. But capacitors can introduce phaseshift which may result in signals of various bits reaching the ADC slightly out of phase. So possibly resistor-network could be a more viable option

    Hope this helps.

    Regards,

    Sid

  • Hi Sid, thanks for the suggestions.

    To explain the sensor output a bit more clearly: since the signal never goes below 0.8v, we can subtract that amount in the hardware, and add it back in later, if necessary, in the analysis.  The goal is to maximize the dynamic range, and anything below 0.8v is "wasted."

    Put another way, we would like an ADC 'P' input of 0.8v to convert to 0x0000, and 2.8v to convert to 0x3FFF (14 bits unsigned).

    It seems that we could manipulate the 'M' and/or Vcm inputs to achieve this result, but the data sheets and app notes are essentially silent on any application that is not AC coupled. It is easy to infer that the ADS644x is internally AC coupled, and cannot convert signals less than about 10 MHz.  Is that right?

    I have modified one channel on the EVM to take a DC input, but I get nothing but noise on the output.

  • Garry,

    The ADS644x do not AC couple the analog inputs.  They can accept input frequencies down to DC.   The default configuration of the EVM is AC coupled, largely because most test equipment is single ended while the analog inputs are differential, and so we use transformer coupling to convert from single ended to differential.  This input circuit will not let DC pass through.  Even when we use a balun input rather than a transformer, we add AC coupling caps so that the common mode of the signal can be set by the VCM pin.

    When DC coupling is needed, we would use the amplifier input circuit, which is made available on channel C of the EVM.  Even this input circuit is AC coupled, so we would have to replace the series caps C46, C47, C48 with zero ohm resistors.  We would have to make sure R184 is installed to conenct the VCM to the common mode input of the amp.   And to use the amplifer input, zero ohm resistors for JP1 and JP2 would have to be turned to connect the amplifier outputs to the ADC inputs. 

    The ADC wants an input common mode of about 1.5V, while the amplifier usually operates off a +5V to ground supply.  If the amp is operating off a +5V to ground supply then this puts the midpoint of the amp at 2.5V which is higher than the 1.5V common mode that the data converter wants to see.  This is one reason we gave a separate banana jack for the lower supply rail of the amplfier.  If the amp were powered off of a +4V supply and a -1V supply, then the midrange of the amp becomes 1.5V which is right where the data converter wants it.  If the amp were powered off of +5 to ground, then the 1.5V common mode gives lots of headroom on the top of the signal but crowds the lower half of the signal.  It will work with the amp powered from +5V to ground, up to some signal amplitude where the output begins to distort due to the reduced room between ground and the 1.5V VCM.

    You didn't say that you tried to use the optional amplifier on channel C when you modifed a channel on the EVM to accept a DC coupled input, so i am guessing that you took a channel and replaced the series AC coupling caps such as C22 with a zero ohm resistor, and replaced the transformers with zero ohm resistors.  This would route the signal straight from the SMA to the ADC, but then there would still need to be a circuit to bias the signal appropriately to the ADC inputs.   We've not tried this - we usually use the amplifier for DC coupled applications.

    Regards,

    Richard P.

  • Hi Richard,
    I didn't used the diffamp input stage because it doesn't seem to address our main problem of level-shifting. Also we are highly motivated to avoid lots of external circuitry. If it looks like we are trying to get "something for nothing," we are.

    Here is what I have on channel B at the moment:  removed T4, R54, R56, and C26.
    Mounted 2, 100K SMT 10-turn trimpots. The wipers go to (the pads of) T4-4, and T4-6, respectively.  The "bottoms" of the pots attach to the ground plane.  The "tops" go to a pair of D-cells for a clean 3v.  I have also added 0.01uF chip caps from the pot wipers to ground.  (The EVM is not powered by the D cells, but by a linear regulated bench supply.)

    I don't use the SMA because one side of it is grounded and we can't have that.

    I adjust the input to INB_M to be +0.8v, and "play" with the other one (INB_P).  Results so far are mixed.  In some places the output tracks the input with about 2 codes of noise. Other places the noise is 600-700 codes.  Still other places the output seems pinned high or low, no noise, yet the input voltage is near midrange. 

    We're still trying to design a systematic test to see what's going on.  May try calling Vcm an input at force it to +1.4v and see if that makes a difference.

  • Hi,

    I can appreciate the desire to keep the design clean and minimal.  But i'm not seeing how the amp can be avoided, after thinking about it more. 

    You wish for the data converter output to be x0000 when the input voltage is 0.8V, and you wish for the data converter output to be x3FFF when the input voltage is 2.8V.

    Keep in mind that the analog inputs of the data converter are *differential* with common mode of 1.5V and full scale = 2V peak to peak.  This means that for an output of x0000 that the in+ would be at 1.0V while the in- is at 2.0V.   The differential input voltage is then -1.0V   But when the output is at x3FFF the in+ is at 2.0V while the in- is at 1.0V for a differential input voltage of 1.0V. 

    Looking at the in+ input pin by itself, it must go from 1.0V to 2.0V while your input signal sweeps from 0.8V to 2.8V.  And looking at the in- input pin by itself, it must go from 2.0V down to 1.0V as the input signal goes from 0.8V to 2.8V.    A 2V peak to peak differential swing means each side of the signal has a 1V swing, and with common mode at 1.5V it additionally means that the in+ and in- are always equidistant from that 1.5V common mode.  (Symmetrical about 1.5V) I can envision a voltage divider and bias circuit that might make the in+ input do what i just described, but making the in- signal ramp down in absolute voltage as the in+ ramps up, i don't see that in a DC passive circuit.  The transformer coupling will do that for an AC signal, and an amplifier can do that for a DC or an AC signal, but other than that I dont see a simple solution.  

    So back to your initial question about biasing the in- to 0.8V, i understand that statement better now.  That would not work, as the data converter does not want one input to be static while the other swings around - that would violate the common mode requirement.  The ADC  want sto see at all times the common mode level of the input to be about 1.5V. 

    Regarding the level shifting with the amp, we do that with the common mode input pin of the amp, but i don't know if that includes DC coupled designs.  And we've done it with the amp by providing an offset to the upper and lower rails of the amp, but that adds more supplies needed so that is unattractive here as well.

    Regards,

    Richard P.

  • Hi Richard, thanks for your patient explanation.

    Something implied here, and which seems to be borne out in our experiments, is that the difference between the P and M inputs can not be more than 1.0v.  (We were expecting 2.0v.) A side effect of that is, that the input voltages must be between 1.0v and 2.0v.  That would explain why setting the inputs to 0.8v and 2.2v with trimpots is not giving predictable results: they're out of range.

    Well, the results are predictable if you can verify this rule for us:
    "The absolute value of the difference between the P and M inputs can not be more than 1.0v."

  • Hi,

    Yes, in internal reference mdoe the maximum difference between the P and M inputs is 1.0V.  (See the analog input section of the datasheet, of which i have attached a portion.)

    It is not so much that the inputs can't go above 2.0V or below 1.0V, as there is a little latitude with the actual common mode level, but they cannot go above VCM + 0.5V or below VCM - 0.5V before the ADC over-ranges and clips at minimum or maximum output code.

    External reference mode would let you expand the full scale range a *little* bit at the expense of performance, as described in the data sheet, but i don't think that option would help much in this case.  External reference is usually meant for applications where multiple ADCs are given a reference of greater precision than the internal reference to remove device to device variation, not to change the full scale range by large amounts.

    Regards,

    Richard P.