The laatest RF sampling ADCs now include Digital Down Converters (DDC). That's a great option, but sometimes the high speed, complexity, and cost mean those chips aren't appropriate for a design.
Is there any plan to add DDC as an option to lower level ADC's like the ADS4125 series?
Having the option of IF sampling could ease problems related to interface speeds.
Lower level FPGA development boards, for example, typically have the power to handle raw data - but lack a suitable High Speed Mezzanine Connector (HSMC, or FMC).
The ability to use a lower standard connection, such as 0.1" headers as used by Arduino, would greatly impact the entry costs for RF design.
