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ADS1115: Voltage Divider for differential voltage

Part Number: ADS1115
Other Parts Discussed in Thread: TLV2462

Hi,

I need help to properly reduce the differential voltage applied to the ADS1115. My circuit is like in the following picture:

I need to measure differential voltage in order to get positive and negative values.

Since I don't know the signal polarity, I have to add two voltage dividers to be within the maximum ratings for each pin.

The readings from AIN0-AIN1 are correct, the readings between AIN2-AIN3 are not. They are definitely below the expected values with a large variance.

From this post (e2e.ti.com/.../2519803), I understand that the input signal (circuit) and the ADC have to share the ground, but since I have to use two voltage dividers I don't know which is the right way to connect the signal to the ADC.

1) Is my circuit topology correct to properly reduce the differential voltage?

2) How do I have to correct it to get accurate measurements?

3) If I add two zener diodes (MMSZ5226B-7-F - 3.3v) as in the schematic, readings are correct up to about 0.8v, after they are below the expected value. Which is the right way to protect the ADC differential input?

Thank you in advance.

Fab.

  • Fabrizio,


    I think your problem is as you expect, which is that the input signal and the ADC must share some sort of common ground. The way that you have the circuit drawn, it appears that none of the inputs have a common ground with the ADC. Then input voltages cannot float around. Normally I would say that you should just ground terminal 1 of both JP1 and JP2 and tie those terminals to AIN1 and AIN3. The AIN0/AIN1 measurement would be fine, as would the voltage divided higher voltage seen at AIN2/AIN3.

    However, if you can't do that then what is it you're measuring? It would help to know what the inputs are if we want to find a good solution to this measurement.


    Joseph Wu
  • Joseph,

    Thanks for your answer.

    Input signals are DC voltages with the positive attached to either terminal 1 or terminal 2 (in other words, I don't know how they are connected and I have to get positive and negative values depending on the connection).

    The AIN0/AIN1 is working fine providing correct positive or negative values. But, if I ground the terminal 1 of JP1, I get correct positive values if the external signal is connected as in the picture or 0 if the external signal is reversed (instead of a negative value). Apparently in this case I don't need to ground the signal in any way.

    Problems arise AIN2/AIN3 and the voltage dividers. When I ground the terminal 1 of JP2, I get correct positive values if the external signal is connected as in the picture or lower than expected negative values if the external signal is reversed.

    Fab.
  • Fabrizio,

    If you need the measurement to be able to take positive and negative values, then you need to establish the common-mode point near the middle of the supply range. Can you put something like this together?

    The 1.65V source would be midway between the supply rails and would need to sink and source current.

    As for the input protection, the 10kΩ resistors certainly help. However, you could insert some low leakage schottky diodes connecting each voltage divider point to GND or VDD. Any high voltage excursions would shunt the current to either rail (going above VDD or below GND). Regardless, the diodes should be low leakage. Any leakage terms would react with the series resistance and cause an error.

    Joseph Wu

  • Joseph,

    Thank you, I made a quick test and it works just fine.

    Let me ask some additional questions:

    1) can I safely remove the two 10K resistors connected to JP1 to have a 1:1 ratio on AIN0/AIN1?

    2) can I increase the 10K resistors to 100K, 1M or more in order to increase the input impedence?

    3) I had a TLV2462 ready to hand. Is it a good option for the voltage source? Can you suggest a better option (SMT mounting)?

    Fab.

  • Fabrizio,


    1. Yes, you should be able to short the two 10kΩ resistors connected to the input source to give you a 1:1 ratio to measure. Note that the other two 10kΩ resistors are required to give the input a common mode operating point.

    2. I would not increase the input resistors to 100kΩ. The ADC input is capacitively sampled and series resistance can disrupt the input sampling. With input series resistance of 100kΩ, you'll see a significant increase in offset and gain error.

    3. I think the TLV2462 would be an ok choice as a buffer. I don't really have any recommendations on op-amps that you can use. As long as the amplifier can keep up with the ADC input sampling, it shouldn't be a problem.


    Joseph Wu