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AFE5818: AFE5818 LVDS Test Pattern Mode

user4535114
Prodigy 90 points
Part Number: AFE5818

Hi,

i am try to send test pattern form afe to my fpga. First I sync my fpga with sync test pattern mode on all 16 channels to get the right 14 bits. After this sync process i changed the test pattern to toggle mode. Here i get 8 channel with 0 and 8 channels with 1. I my opinion the pattern must be global for all 16 lvds lines. Is that right?

Thanks

  • 0
    TI__Mastermind 49176 points
    Hello,

    Welcome to TI E2E forum!

    Regarding the question, the test patterns specifically the toggle test pattern have to be synchronized on the LVDS serialized output lines.
    The Toggle test pattern can be reset or synchronized by providing a sync pulse on the TX_TRIG pin.
    Refer to section 9.3.5 in the AFE5818 datasheet for more details.