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AMC1306M25: Operation below 5MHz

Part Number: AMC1306M25
Other Parts Discussed in Thread: ADS1201, AMC1204

Hello team,

Hope you are well. When you get a chance please see below customer question:

We need the PWM clock frequency to be adjustable in the 20 to 200 kHz range (as opposed to a 5MHz to 20MHz range).

I remember debugging with this chip and I thought I was able to use the chip with a slower clock frequency than 5MHz.

Is there a hardware engineer that could confirm the AMC1306 chip could operate below 5MHz in some reduced capacity?

  • Hi Randhir,

    We can't guarantee anything outside of the datasheet specifications and normally, the PWM frequency of the switches in the bridge are significantly lower than the sampling frequency of the modulator. What are you using as the digital filter? Assuming a SYNC filter, what order? What OSR do you plan to use?
  • Hi Tom,

    While searching for parts I stumbled across the ADS1201 Delta Sigma Modulator, it is an old part so I have some worries about using it in a design, but it looks very similar to what I would need (since it allows an MCLK frequency of 20 kHz to 1 MHz). I am aiming for a 100 kHz MCLK due to some limitations of the isolation that is being used on the digital clock and data lines. I assure you that some of the specifics of this design require a low MCLK frequency.

    I would like to move to a new part like the AMC1306 or AMC1204 because of existing applications where I've used it, the power supply flexibility to use 3.3V, the AEC-Q100 Automotive Testing, Higher Temperature Rating, and newer product (less worries about part obsolescence). Ideally, this would be fed directly into a C2000 280049 or C2000 28377D, it depends on the application. I would plan on configuring the SDFM for the SINC3 filter with the maximum OSR (of 255 iirc). My main concern is accuracy / ENOB, which is why I would max out the OSR. Technically since the SDFM in the C2000 has two parallel settings I could also interpret the modulator using the current limiting registers as well.

    Do you know of a part that is more suitable than the AMC1306/AMC1204, or something that is newer than the ADS1201 with better specifications?

    Thanks

  • Hi Daniel,

    I don't understand the 100k clock limitation thing, can you expand a bit on that? The clock that runs the modulator in the AMC1306 is 20 MHz (ideally), and with an OSR of 256, that gives you a sample rate of 78 KHz. Dropping the modulator clock to 100K would give you a sample rate of 309 samples per second, which is not fast enough to do any control algorithm that I can think of. Also 20 MHz @ 256 OSR gets you into the 14-bit ENOB ballpark. What accuracy levels are you looking for?
  • Hi Daniel and Randhir,

    Have you made any headway here?
  • Hi Tom,

    The reason for the lower rate of communication (100k clock limitation) really stems from how this system is isolated. We are attempting to communicate over an inductive isolation boundary (essentially Near Field Communication, but not at the standard 13.56 MHz). The NFC boundary provides power to the Sigma Delta Modulator, and we would like to be able to communicate at lower clock speeds back. Communicating at higher frequencies does not work for this, that is why I was looking at the ADS1201. It essentially does what I need, however, it would be nicer to have a chip that can do Manchester encoding, is rated up to 125C, is powered by 3.3V, etc.

    The control algorithm this would be looking at is very low bandwidth -- Like 10Hz bandwidth, so the 309 Hz sample rate of data you calculate would not be perfect, but it would be possible. The requirement on accuracy is probably only 10 bits, but if there is a simple way to increase the ENOB, then I wouldn't mind doing that.  

  • Hi Dan,

    No promises on what kind of performance you might see, but I'll contact you off line with a potential solution.