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ADS1118: ADS1118 general library code

Part Number: ADS1118

hello!

          I'm currently working on a project in which I've interfaced the ADS1118 IC with a stm32f2x microcontroller. I already went through the example codes available for it, but as I'm not very familiar with TI ICs or controller I'm having a little bit difficulty in understanding the flow so I just need some referential code(not merged with any controller standard library) or general libraries which I can use directly in my project.

Thanking with regards
Aatif Shaikh

  • Hi aatif,

    I'm not aware of am ADS1118 specific library that might help you, but is is a relatively simple SPI type device.  Have you looked through the source code associated with the 430BOOST-ADS1118?

  • Hello, ,
    Thank you for your concern, I've successfully ported the "ADS118-BOOST" library for stm32f2xx and its working very well. Currently, I'm using 1.875MHZ baud rate at the moment but I wanted to know what could be the maximum clock speed of ADS118 I can use.

    Thanking with regards,
    Aatif Shaikh
  • Hi Aatif,

    the maximum SCLK frequency supported by ADS1118 is 4MHz.
    This is specified as 'minimum SCLK period, t_SCLK = 250ns' in the datasheet (see the 'Timing Requirements' section).

    Regards,

  • hello!

    I'm having an issue reading multiple channels in continues conversion mode in ADS118 it keeps giving me ADC voltage of last channels regardless of whichever command I'm sending to read the ADC. any idea how to read in multiple channels in continues conversion mode? 

    Thanking with Regards
    Aatif Shaikh

  • Aatif,


    Reading multiple channels from the ADS1118 in continuous conversion mode usually requires using the /DRDY function to indicate when a conversion has completed. It can be a bit difficult, and for that reason, we often recommend that customers use the single conversion mode.

    The problem is in the timing of when the device programmed to when the data comes out. If you are writing to the configuration register, the conversion does not start immediately. The conversion starts after completion of the conversion already in progress.

    For example, take a case where the data rate is 128SPS (a data period of 7.8ms). If a conversion has just started and you write to the configuration register immediately after, then you would need to wait 7.8ms to finish this conversion and then you would need to wait another 7.8ms to get the conversion that you want. In this case, it takes up to 2x the data period get the data for the new configuration (~15.6ms). Also, because there is some variation in the internal clock frequency, there will be an additional ±10% of variability in the data rate. To be sure, you would need the /DRDY to indicate that data is ready to be ready out.

    If you read the data too early, you'll just read back the last conversion.

    In many cases, we'd recommend using the single-shot mode to read the device and set the new conversion. In that case, you could write the configuration and start the conversion, wait the appropriate time, and then read back the data.


    Joseph Wu