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ADC12DJ3200EVM: How to Pair an FPGA with the ADC12DJ3200EVM

Part Number: ADC12DJ3200EVM

I am trying to connect the ZCU102 Ultrascale+ FPGA and the ADC12DJ3200EVM together so I can feed through test waveforms. Is there any documentation that talks about how to connect the FPGA and ADC EVM correctly?

  • Can anyone help me here?  I am trying to connect the ZCU102 Ultrascale+ FPGA and the ADC12DJ3200EVM together so I can feed through test waveforms. Is there any documentation that talks about how to connect the FPGA and ADC EVM correctly?

  • Hi Zachary

    We don't have information directly applicable to that EVM combination.

    We do have a reference design for the ADC12DJ3200EVM with the KCU105 platform. That information is available in the Software section of the ADC12DJ3200EVM folder here:

    I hope this is helpful.

    Best regards,

    Jim B

  • Thank you. However, my question is more about connecting the ADC to FPGA in a way that I can program both of them together. Currently, the ADC causes my FPGA to become unprogrammable. Is there some pin adjustments that need to be made to the ADC so that it can attach to the KCU FPGA? This would be helpful to reference for my design.

  • Hi Zachary
    Please check whether J27 (JTAG loopback) is installed or uninstalled on the ADC12DJ3200EVM. Whichever state it is in, try the opposite state to see if that resolves the issue.
    You can also try a similar exercise with J26 (PG_RX1). This is used to connect the signals PG_M2C and PG_C2M in case that is needed for some carrier boards.
    One final thing to try would be removing R106 which is a pull-down resistor for the PRSNT_M2C signal. Removing the resistor will indicate to the FPGA board that no mezzanine card is installed, which may help things.
    Let me know if any of those help, or if you still have the issue.
    Best regards,
    Jim B
  • Thanks Jim. I put a jumper on the J27 (Jtag loopback) on the EVM and now the ADC and FPGA can both be programmed. If you could help me understand why this is the case that would be great.

  • Hi Zachary
    Here is my understanding.
    When no FMC mezzanine card is connected the JTAG programming path to the FPGA is direct, only through the carrier board circuitry.
    Once an FMC mezzanine card is connected and detected as present, then the JTAG programming path loops through that FMC connector. This requires a completed JTAG loop on the mezzanine card, so this only works when that jumper is installed.
    On our TSW14J5xEVM capture boards we don't utilize the JTAG path, so the missing jumper isn't an issue.
    Best regards,
    Jim B
  • This makes a lot of sense. I guess I just didn't put the two pieces together. Thanks again.