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ADS127L01: SPI DOUT does not give any data

Part Number: ADS127L01

Hello,

I would like to able to synchronize when to read the ADC data using the SPI command.

I am working with the following setting:

- START pin connected to ground permanently

- HR= 1, FORMAT= 0, OSR0= 1, OSR1= 1, FSMODE=0, FILTER0= 0, FILTER1= 1

- CLK= 8MHz

The problem is that I can not get any data from the DOUT pin (LOW all the time).

I am reading the SPI data with an STM32F4 Discovery board. Below is the code excerpt (some of the details are omitted for the sake of brevity).

int main(void)
{

  cmd_data = 6; // RESET command (according to the datasheet 8.5.1.8 SPI Commands)
  HAL_SPI_Transmit(&hspi2, &cmd_data, 1, 1); // transmit 1 byte of data

  HAL_Delay(100); // delay for 100 ms
  
  cmd_data = 8; // START command
  HAL_SPI_Transmit(&hspi2, &cmd_data, 1, 1);

  while (1)
  {

	cmd_data = 18; // RDATA commmand
	HAL_SPI_Transmit(&hspi2, &cmd_data, 1, 1);

	HAL_Delay(1); // delay 1 ms to allow the data to be reloaded to the output shift register
	HAL_SPI_Receive(&hspi2, &meas_data_1, 1, 1); // receive 1 byte of data
	HAL_SPI_Receive(&hspi2, &meas_data_2, 1, 1);
	HAL_SPI_Receive(&hspi2, &meas_data_3, 1, 1);
  }
}

I also noticed that the DRDY pin never changes state (always HIGH) when I permanently grounded the START pin, is this behavior normal?

Could you kindly point out where I made a mistake?

Thank you in advance

Kind regards,

Yudha

  • Hello Yudha,

    It appears that the ADC is not properly decoding the commands. The DRDY pin should be toggling at the output sample rate once the ADC interprets the START command.

    This could be due to a schematic issue or a timing issue on the SPI bus.

    Please measure and verify the supply voltages.
    1. AVDD should be between 2.7V and 3.6V.
    2. LVDD should measure ~1.8V.
    3. DVDD should be between 1.7V and 3.6V.
    4. VREFP should be in the range of 0.5V to 3.0V.
    5. Verify 8MHz at the CLK pin, and voltage levels Vil<0.3*DVDD, Vih>0.7*DVDD

    If possible, please send a picture of the waveforms with SCLK, /CS, DIN to verify proper timing. Also, after the supplies have stabilized, you should not attempt to write to the device (SCLK active) for at least 4.1mS when clk=8MHz.

    Regards,
    Keith N.
    Precision ADC Applications
  • Hello Yudha,

    If you have any additional data or questions, please feel free to respond to this thread.

    Thanks,
    Keith