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ADS1274: SPI speed

Di Wang
Expert 1740 points
Part Number: ADS1274

Hi,

The sampling rate is 60k sps per input channel. I found the next sample data (data ready output/DRDY) comes earlier than I finish reading the current sample. Should I increase the SCK for this application?

Thanks.

  • 0
    TI__Guru 57336 points

    Hello Di,

    There are few options for increasing data throughput on the ADS1274 interface.

    1. In the serial interface mode, you will need a minimum 60 kSPS x 4 ch x 24 bits = 5.76 MHz. This does not account for any interface or processing delays, so realistically you will need SCLK to be slightly faster.
    2. If you're not reading from all channels, you can power down the unused channels and remove them from the data stream. This is known as the TDM dynamic position mode.
    3. If your MCU can accept multiple MISO connections, you can use the Discrete Data Output Mode and read data from each channel on a separate DOUTx pin.

    Regards,

  • 0 in reply to Ryan Andrews
    Expert 1740 points
    Thank you, Ryan.
    I can reduce the date rate/ch to 15ksps (minimum rate of this system), so I can only use the values of fclk and CLKDIV of Table 8? How about, fclk=7.68MHz, CLKDIV=0, fclk/fdata=512, then data rate=15ksps?
  • 0 in reply to Di Wang
    TI__Guru 57336 points
    Hello Di,

    The minimum clock input for all modes is 100 kHz. This means that the minimum data rate is actually 39.0625 SPS (Low-Speed Mode, CLKDIV = 1). The input clock frequency can scale as specified in the Electrical Characteristics table.

    If fCLK = 7.68 MHz, CLKDIV = 0, and fCLK / fDATA = 512, then you are using Low-Power Mode, which is ok. The output data rate will be 7.68 MHz / 512 = 15 kSPS.

    Best regards,