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ADS122C04: common mode voltage

Alen Barisic
Intellectual 1300 points
Part Number: ADS122C04
Other Parts Discussed in Thread: ADS112C04

Hi everyone,

Question 1: The question is about Fugure 44 in the datasheet. If the input common mode of the ADS122C04 drifts out of the mid supply and is gained by the PGA to a not allowed voltage level, what behavior would the ADC show on the output? Does the ADC recognize the issue or does it cut the voltage on the supply rail? Please find attached a modified figure of this scenario

Question 2: we want to measure small currents through a shunt resistor. But there could also appear higher currents through the shunt in this application. This would cause a voltage drop, which could be higher than AVDD or lower than AVSS. What needs to be considered in this case? Are the internal clamping diodes designed for that or need external diodes? Point 9.2.1.2 also mentions series resistances.

Thak you in advance!

Regards, Alen

  • 0
    TI__Guru**** 168425 points

    Hello Poster!

    Our support staff is taking time with their families for the Independence Day holiday here in the US.  It may be July 8th before we can get back to you with help on your query.  We apologize in advance for the delay and will get back to you as soon as possible.

  • 0
    TI__Guru** 112705 points

    Hi Alen,

    For question 1, the input does not necessarily require that the common-mode be at mid-supply.  The common-mode input range can be computed based on the formulas 6 and 7 on page 24 of the ADS122C04 datasheet.  As gain increases the input range becomes more restrictive.  As the PGA cannot drive all the way to the supply rails, there will be an issue with linearity as the output voltage attempts to drive to the rail.  If the common-mode is too high, then the linearity issue will show on the output voltage as the amplifier attempts to drive to the AVDD rail.  If the common-mode is too low, then the linearity issue will be seen as the voltage attempts to drive to AVSS.  Hopefully this explains what happens.  If not, please try attaching the modified diagram again as it did not come through the first time.

    For question 2, the analog inputs must not exceed the Absolute Maximum Ratings for the ADS122C04.  The key ratings  relate to voltage/current at the inputs.  The design should attempt to prevent voltages greater than 300mV above AVDD or 300mV below AVSS.  When voltages exceed these values, then current will flow through the ESD structures in the ADS122C04.  If the current exceeds 10mA the device will be damaged.  The design must not allow this to happen by placing low voltage clamps (such as TVS diodes) along with resistors in series to the input to limit the current to 10mA or less for any over-voltage conditions.  The clamps need to be low leakage to prevent measurement error.

    Best regards,

    Bob B

  • 0 in reply to Bob Benjamin
    TI__Intellectual 1300 points

    Hi Bob,

    Thank you for the information.

    can you tell me if there are differences between ADS112 (16bit) and ADS122 (24bit) besides the higher resolution?

    Best regards,

    Alen

  • 0 in reply to Alen Barisic
    TI__Guru** 112705 points

    Hi Alen,

    The ADS122C04 and the ADS112C04 are the same device except for the resolution.

    Best regards,

    Bob B