Other Parts Discussed in Thread: LMK04828
Hi,
Our company is using ADS42JB69 to send data to FPGA.
I have read from the other post that we should use LVDS to drive SYNC~ and SYSREF pin for JESD204B on ADS42JB69.
However, from the Arria 10 FPGA (and the LMK04828) datasheet, the LVDS has a common voltage of 1.25V, with 1.125min and 1.375max.
But the datasheet of ADS42JB69 states that the input common mode voltage should be 0.9V.
So I don't understand how this gonna work since we have this voltage difference and it's DC coupled.
Thank you so much!