Hi team,
Can you explain the de-interleave function in the block diagram? One of my customers asked this question. I didn't find a description in the datasheet.
Best Regards,
Amy Luo
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Hello Amy,
The DAC3283 LVDS bus only have 8 LVDS receivers for the 16-bit wide I and Q signal. Therefore, the 8 LVDS data transfer has to be byte wise interleaved data bus operation. This is shown below.
You can see it takes two DATACLK cycle to latch in 16-bit I and Q signal (1 sample).
Therefore, the data input must be "de-interleaved" by internal logic into signal 16-bit I and 16-bit Q. This process is done natively in the DAC3283 logic, and no additional user configuration is required.