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ADS124S08: ADS128 analog power removal

Davide Giovanelli
Expert 1275 points
Part Number: ADS124S08
Other Parts Discussed in Thread: TPS793

Hello,

I'm using an ADS124s08 which is connected to an MCU. The application requires it to sample data pretty rarely, therefore, for the rest of the time I would like to reduce the power consumption.

One of the higher current sinks in the system are the resistive bridges I'm sampling with the ADC and I realized that the AVSS-SW pin of the device is made for that. However, the hardware is not configured for using it (the low side power of the cells is not taken from AVSS-SW pin).

In contrast, the analog section of the system is powered through a dedicated LDO (TPS793), which have the ENABLE pin that I can control from the MCU.

The question is: can I safety turn off the analog power to reduce the consumption of the bridges? Is so, does the DRY flag of the STATUS register properly indicates when the analog part has ramped up?

Thank you,

Davide

  • 0
    TI__Guru** 112725 points

    Hi Davide,

    If I understand your question correctly, you are unable to use the AVSS-SW switch to break the sensor excitation and would like to just turn off the AVDD supply instead.  Is that correct?

    If you turn off the analog supply you must make sure that the Absolute Maximum Ratings are not exceeded and in particular the analog inputs.  As long as there is not a voltage applied to the analog inputs when AVDD is turned off you should be ok.

    Turning off AVDD will place the ADS124S08 into a reset state.  You will not be able to release out of the reset state until AVDD has reached nominal operating voltage.  Once the device releases from the reset condition all registers will return to the default values.  This will require that any configuration previously used will need to be written again.  The STATUS register will give you some additional information.  Bit 7 (FL_POR) will be set indicating that a POR occurred.  Bit 6 (nRDY) of the STATUS register indicates if the ADS124S08 is ready to accept configuration changes for communication.  If the bit 6 is high, the device is still starting up and when low you can go ahead and rewrite the configuration.

    If there are caps still charging either due to the caps on the power supply or caps on the analog input path, the nRDY flag will not indicate that the analog signal path has settled.  This is the same condition as the initial power-up sequence.

    Best regards,

    Bob B

  • 0 in reply to Bob Benjamin
    Expert 1275 points

    Dear Bob,

    thank you, that is exactly what I wanted to know.

    Thank you,

    Davide