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Part Number: DAC7811
We use DAC7811 for sine wave signal generation at low frequency (about 2KHz). The DCA7811 is supplied with +3.3VDC power supply. The SPI bus is driven by an FPGA sending all approximated sine wave points with a CLK frequency of 10 MHz. When doing a power cut asynchronously from SPI frame sending, we want to be sure that this power cut is long enough to ensure a correct reset of DAC digital interface.
We have seen in datasheet there is a power on reset module but no information is given in this document about the minimum power cut duration for this module to operate correctly and how long we have to wait after power supply recovery before sending the first SPI frame.
Have you any recommandation for a minimum power cut duration (@+3.3V) ?
Many thanks for your help
Mostly the mechanics of the POR are related to the voltage level provided on the power pins. Ideally, the power is completely discharged to 0V before power is applied again to guarantee the POR on the next application of power. I just say "ideally" here because as you've pointed out this particular datasheet does not comment on exactly what the POR threshold is.
Having familiarity with other devices on the same process technology that most likely used the same POR implementation, typically we suggest the power supply to drop below 0.7V because the POR threshold isn't trimmed and will occur somewhere between 0.7V and 2.2V when you consider all corner lots and all operating temperatures.
Once again, generally the suggested timing for this event is 1ms.
Kevin Duke, MGTSADC Product Marketing Engineer
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In reply to Kevin Duke:
Many thanks for your very quick answer
Our +3.3VDC power cut duration (below 0.7V) is about 45ms and therefore seems large enough to guarantee correct
power on reset of the DAC7811, especially for digital part (SPI state machine).
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