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TLV320ADC3140

Other Parts Discussed in Thread: TLV320ADC3140

SUBJECT : the TLV320ADC3140

 

Good day,

With over 64 audio analog ampifiers in a system on our workbench we are compulsing the TLV320ADC3140 literature ( datasheet).

We would like to integrate this audio analog-to-digital converter on a system for which we are usin ModelSim to simulate its performance and instantiation. For the purpose we wonder if you can provide us with VHDL or Verilog code.

The system will probably use DSP, FPGA or other similar resource (asic for instance)

How can you help.

With kind regards.

Fiezdine SUMARA 

 

  • Fiezdine, 

    While the design team does have Verilog files for their own simulation, this is considered confidential IP, and TI does not share this with Customers.  We do have an IBIS model if that is helpful.

    best regards,

    -Steve Wilson 

  • Good day Mr WILSON Steve,

    Whilst understanding your design team has private Verilog files for the simulation carried internally, I do understand the confidentiallity policy regarding TI's IP. We would make a good usage of the helpful information you make availlable. Please send us  the IBIS model with all its explanations.

    Please note that we are ready to enter a non disclosure agreement with TI for this particular design we are currently working on.

    That is indeed because we will be needing more advise on other TI component parts entering our bill of materials ;

    Please let us know :

    a) if we can have few TLV320ADC3140 samples sent to us : Court SUMARA / Fiezdine Sumara 5 rue Léo Frankel 75013 Paris- France ;

    b) the extent of the engineering guidance we can obtain from TI.

    With kind regards,
    Thanks

    Fiezdine SUMARA

  • Fiezdine, 

    The IBIS model is available online here.

    We are happy to work with you, however even with an NDA I have not seen TI share verilog files.  

    You can order samples for the ADC3140 online.

    We are happy as always to offer engineering guidance,  These ADCs are not particularly complicated, I am curious to what extent you believe you will need engineering guidance? 

    best regards,

    -Steve Wilson

  • Good day Mr. WILSON Steve,

    Thanks for your help. We will be filing a sample request.

     These ADCs  do seem not complicated, we will deploy all the efforts to manage it internally, yet, as things always happen, it is good to know that you are out there should help be nedded.

    As to the  extent we believe your guidance  will be needed

    The (ADC3140)  TLV320ADC3140 's datasheet is very detailled and keeps sending to other information sources. Thus, regarding its utilisation to build a I2S bus for instance may require engineering guidance. At this early documentation stage, and working with different tools, processor,  manufacturer's  such as intel ( quartus ), Ibm ( PCIExpress), etc.. we will only have a clearer understanding of it all at an advanced stage ( only, a few, couple months to go). 

    Please check if the unseen ( NDLA Verilog) could be foreseable.

    Do the clocking and other logic, mux, setups, registers appear in the .ibis file?

    Thank you      

    With kind regards,

    Fiezdine SUMARA