DAC38RF82EVM: Dual DAC, real mode, 4x interpolation (LMFSHd = 82121)

3503925

Part Number: DAC38RF82EVM
Other Parts Discussed in Thread: TSW14J57EVM,

I have a DAC38RF82EVM with a TSW14J57EVM, I tested the hardware setup using the 8741.6144MSPS_8x_10M_ref_LMF_841.cfg configuration from another forum post, and everything works fine.

Now I'm trying to get 2Tx, real input, 4x interpolation, 82121 mode working using a 125MHz reference connected to the J25 OSCIN input. The shunt on JP3 is removed to power down the122.88MHz VCXO and C49 moved to C366 to connect J25. Could you please provide a configuration for this mode working close to 9GSps?

Thanks,

Tom

over 4 years ago

0 dBrock over 4 years ago

TI__Genius 12780 points

Hi Tom,

One of our device experts is looking into your question, and will be back with you soon.

Best Regards,

Dan

0 3503925 over 4 years ago in reply to dBrock

Prodigy 20 points

Hi Dan,

Any update on this?

Thanks,

Tom

0 jim s over 4 years ago in reply to 3503925

TI__Guru* 91947 points

User,

If you plan on using OSCin, you will also need another external reference frequency to get the LMK to output a clock source to be used by the DAC PLL. I do not think this is what you want to do. Your other option is provide a 1125MHz reference clock to J4, and remove jumper JP10. This will allow the LMK to operate in clock distribution mode and provide a 125MHz reference clock to the DAC for the PLL to create a 9GHz clock and provide the required device clock to the FPGA and SYSREF to both. See attached for GUI setup.

Regards,

Jim

DAC38RF82_real_821_PLL.pptx

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DAC38RF82EVM: Dual DAC, real mode, 4x interpolation (LMFSHd = 82121)