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ADS1232: ADS1232 Common-Mode input range consult

Part Number: ADS1232
Other Parts Discussed in Thread: ADS124S08, ADS1220, ADS1260

Hi team,

I am curious about how to calculate the Common-Mode input range when AVDD = DVDD = VREFP = +3V, I cannot find it in datasheet. Thanks.

  • Hi Charles,

    The common-mode input range doesn't really change from 5V to 2.7V.  I suspect that the question is being asked because at 3V or lower there is no real range but rather just AVDD/2.  The specification is somewhat aggressive, but in general when the supply is less than or equal to 3V then you would want to center the PGA output based on the common-mode of 1/2 of the supply.  As the ADS1232 is primarily used in bridge applications this is not an issue as the common-mode is 1/2 of the excitation voltage for bridge sensors. And the excitation voltage is used as the reference in ratiometric measurements.  This leaves AVDD = REF = EXC.

    Best regards,

    Bob B

  • Hi Bob,

    Thank you for your response here. From you answer, the common-mode input range is 1.5V-1.5V, only one point here, this is very strict requirement for the input signal if it is not bridge applications. What will happen if the input common mode voltage is lower than 1.5V, such as 1V?

    And I find in datasheet that higher gain will lead to smaller common-mode input range.What is relationship between PGA gain and common-mode input range?

  • Hi Charles,

    At some point you will start to see linearity errors if you exceed the common-mode input range with respect to the input voltage.  This will also be somewhat temperature dependent.  For the ADS1232 and at gains of 1 and 2 the common-mode input range is greatly extended as the input bypasses the PGA and the input is sampled with a switched capacitor input.  This allows the common-mode input range to vary from AGND - 100mV to AVDD +100mV.  The PGA has a fixed gain of 64.  The topology is similar to a instrumentation amplifier.  The restriction for common-mode relates to the ability of the PGA to drive close to the rails. 

    If the common-mode is at AVDD/2, then at full-scale input the output will be centered at mid-supply and the peak output lower than the supply rails.  If the common-mode increases then the output will swing toward the positive rail.  If the common-mode decreases the output will swing toward the negative rail.  As the output attempts to drive toward the rail, there will start to be a linearity error as the PGA cannot extend all the way to the supply rails.

    So depending on common-mode and input voltage applied there may be a range where you will not see a linearity error.  However, for the purposes of this device the ADS1232 was not characterized this way so we do not have specific data to show performance.  Newer devices such as the ADS1220, ADS124S08, ADS1260, etc. have a much better description both in terms of determining the common-mode for a specific applied voltage and a much better description of how the PGA works with respect to the common-mode within the device datasheets.  I would suggest reading through one of those datasheets to understand how the input voltage and common-mode of the PGA affect the output which is then converted by the ADC.

    If there is a need for a looser common-mode restriction, then perhaps the ADS1232 is not the best part to use.  Note at the top of the ADS1232 datasheet that it is described as '24-Bit Analog-to-Digital Converter For Bridge Sensors'.  This was the primary design purpose.  Although other sensors can be connected (such as a thermocouple) the bias for these sensors can be set to mid-AVDD supply.

    The alternatives would be to use a larger supply voltage to increase the common-mode range, or to use a different device such as those I just mentioned above.

    Best regards,

    Bob B

  • Hi Bob,

    Below is the feedback of customer.

    Thanks.

    Robin

    I want to know whether our circuit parameters can fit the ADS1232 demanding.

    Our ADC's supply voltage is 3.3V.

    The following signal voltage is our largest voltage value:

    VINP=1.3852V(AINP's common-mode voltage)

    VINN=1.3786V(AINN's common-mode voltage)

    So our largest signal voltage VIN=VINP-VINN=6.6mV

    Then the VOUTP=VINP+VIN*(GAIN1-1)/2=1.5931V (GAIN1=64)

                   VOUTN=VINN-VIN*(GAIN1-1)/2=1.1707V (GAIN1=64)

    So can you help us check VOUTP and VOUTN whether it causes linearity error of ADS1232's PGA.

    Our device has low power consumption demands, so the supply voltage of ADS1232 and sensor must be set to 3.3V.

    What about if GAIN1=128? Thanks.

     

  • Hi Charles,

    let me jump in while Bob is enjoying his vacation.

    The common-mode voltage is defined as VCM = (VINP + VINN) / 2. So in your case VCM = (1.3852V + 1.3786V) / 2 = 1.3819V.
    This would officially violate the specification in the ADS1232 datasheet which says VCM >= AGND + 1.5V. However this specification assumes that a full-scale differential input signal is applied. In your case the differential input signal is much smaller.

    As you correctly calculated, the voltages at the PGA positive and negative outputs are still far away from the supply rails in your situation. This would be okay for ADS1232 and not cause any linearity issues. You could even use Gain = 128 in this case.

    Some of the other ADCs that Bob mentioned above have lower power consumption than ADS1232. So if power consumption is very critical you may want to look at ADS1220 or ADS124S08.

    Regards,