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Need low offset error DAC

Other Parts Discussed in Thread: DAC8750, OPA191, OPA2338, OPA192, OPA188, OPA189, TLV2186, DAC8801, DAC8830, DAC7811, TIPD159

Hi,

We have a voltage controlled current source with <0.5% error.  We'd like to drive it with a voltage DAC, but the offsets are on the order of 0.5mV, which causes ~5% error in our current source.  I don't see any DACs that have offset <50uV.  Can you suggest a solution?  Why aren't there any DACs that autozero like op-amps?  At this point the only thing I can think is to calibrate using an ADC (force/sense).  Another idea I had was to use a high voltage output DAC and attenuate (also attenuating the offset), as we only need 0-2V output.

I was also thinking to use the DAC8750 as the current source, but its accuracy is specified in TUE of full scale, which still seems too high, 0.2% of 20mA = 100uA.  We need ~1uA accuracy.

Thank you,

Erik

  • Erik,

    Can you share any details about the design of the current source itself? Perhaps we can make some suggestions there which would lessen the dependency on the DAC offset error.

    There are some DAC products which are un-buffered, either R-2R or multiplying DACs, which do not include offset errors since there is no output buffer to contribute that end-point error which could be good option to consider.

    As to why DACs do not include auto-zero output buffers - these output stages are a bit more complicated that the standard op-amp and are typically actually part of the segmentation scheme of the DAC itself in the form of interpolating amplifiers. In some cases implementing the auto-zero or chopper idea is prohibitively complex for a standard DAC product where extremely low offset isn't necessarily commonly in demand, but it is feedback we will take into consideration.

  • It's somewhat similar to figure 8 in this appnote:

    https://www.analog.com/media/en/technical-documentation/application-notes/an45f.pdf

    We connect the instrumentation amp differently though (and actually we use a diff amp), but for purposes of error analysis you can just assume its like the appnote figure 8.  We need 100uA to 20mA range with <1% error.  Our current set resistor is 100ohms.  With 0.5mV offset error across the resistor, we get 5uA error (5%) at the low range of 100uA.

    Thinking a bit more, we could probably accept an unbuffered differential current output DAC straight into our diff amp stage (without input resistors).  That might work well, do you have a couple part numbers you could suggest?  This is not a high speed application.

    Erik

  • Erik,

    I probably should have thought to ask this earlier - but what output current range do you look to design? Based on the DAC8750 mention and the circuit you've cited from the link it looks like you want a high-side current source.

    One option would be to basically build the DAC8750 discretely such that you could customize the design to your desired output range, potentially reducing the impact of the DAC offset error. There is a "Circuit Cookbook" for what is inside the DAC8750 here: http://www.ti.com/lit/an/slaa867/slaa867.pdf

  • We actually already went down that path with the "off-the-rail high side" current source.  The problems we had were to find a rail-to-rail input amp that can handle +15V supply (our compliance requirement), but also have very low input offset voltage and input bias current.  That's a pretty tall order for an op-amp, I think the OPA191 is probably the only amp I've found that can do it and I don't want to rely on one op-amp for production.

    The application note uses the OPA2338, which has an input offset voltage error of 0.5mV typical, which means up to a 0.5mV error across that 4.7ohm output resistor would be around 100uA of error!  In order to get something to work, I'd need an amp that has only 5uV of offset (again, that would be the OPA191 (-:). It would be good if the application note analyzed DC accuracy.

    Can you elaborate again on the unbuffered DACs that do not have output errors?  I admit my knowledge on DAC architectures is limited, is there an application note that can walk me through the output stages and what I need to do to use an unbuffered output?

    Thanks Kevin!

    Erik

  • Erik,

    There are a few other amplifiers I can think of off the top of my head that could apply here. The OPA192 and the OPA188. But yes, in general a 36V "high-voltage" rail-to-rail amplifier is pretty tough to come by. I can request one of my counterparts from the amplifier business to jump in on this thread as well as they would certainly have a better on-hand awareness of their portfolio or any upcoming roadmap devices that would widen your selection.

    One tool that would be helpful for you with as far as finding these DACs goes is the parametric search tool on TI.com, which is located here: http://www.ti.com/data-converters/dac-circuit/precision/products.html

    On the side-bar you'll find some filters which are helpful.

    To see the multiplying DACs click on the "Multiplying DAC" checkbox in the "Architecture" filter.

    To see the un-buffered R-2R DACs, uncheck this box (also, do not check the "R-2R" box in "Architecture") and click on "Un-buffered Voltage" in the "Output type" filter.

    Basically the difference between the two is how the R-2R ladder is being used, but both structures use the same ladder topology. In the traditional R-2R topology you create a binary weighted voltage divider looking from the reference input to the voltage output and therefore simply apply a buffer at the output.

    The MDAC effectively flips this upside down applying the reference input at the old "VOUT" node and taking the output at the "VREF" node. This uses the ladder as a binary weighted current divider, which then requires a transimpedance stage at the output in order to convert into a more conventional voltage output DAC system.

  • Hi Erik,

    I'll play the role of the "op-amp guy".  :O)  The OPA191 and its higher speed brother OPA192 are flagship devices that aren't going anywhere anytime soon.  In fact we continue to spin derivatives products from that core IP.  So rest assured these are good choices and many of our customers are designing in these awesome products every day.  Likewise the OPA188 and newer OPA189 are flagship zero-drift devices that have similar derivative roadmap plans.  The TLV2186 low cost zero-drift device offers rail-to-rail input performance.  

    That being said, while they the OPA19x families are rail-to-rail in devices, they do exhibit crossover and do not carry uV level precision through they entire common mode range (input stage transitions near the positive rail).  Is it possible to supply Vcc with a voltage greater than the input signal to avoid this crossover region?  

    Autozero devices have higher bias currents (due to charge injection) than their linear CMOS counterparts.  That being said, you mention building a diff amp, and the current through the resistors would far exceed the bias currents we're talking about here.  Maybe you can provide some more detail around this stage to make sure I'm not missing something.  There is also the possibility that a fixed gain current shunt monitor could be employed as your difference amp.  

    Thanks,
    Scott

  • Hi Scott (op-amp guy),

    Thanks for the input.  At the moment we are going with OPA192 for our diffamp-based current source, seems to work well with ~0.5% accuracy from 100uA up to 20mA and settle around 1us.  Looking back at my lab notes, we didn't actually try the OPA191 or OPA192 for the off-the rail high side method linked in this thread.  I might have to go back and try it.  We tried several other RR-input op-amps but couldn't get much better than 5% accuracy at 100uA, I suspected that the offset got much worse as I got close to the rail.  The thing I don't like about the off-the-rail current source appnote linked above is the specification of 1% FSR accuracy, which, unless I misunderstand, means that if the FSR output is 20mA, I could have as much as 20mA*0.01 = 200uA of error any where along the output range (including my low range of 100uA in my case).  I'm finding it much harder to design 1% accuracy at any point across the range, especially at the low range as offset voltage tends to dominate.  And you are right, the offset current is less of an issue with these FET input op-amps.  Although some of the RR-input amps we tried were bipolar inputs with 200nA of current, which isn't negligible with 1k resistors, as that's 200uV of offset.  Anyways, thanks for the tips on the other devices, I will check them out

    Erik

  • Hi Kevin,

    I'm looking at unbuffered DACs per your advice.  DAC8801 current output looked good at first glance, but then it looks like the full-scale accuracy is only 20%.  Strange that its specified 20% only on the first page though, nothing about it in the Electrical Characteristics.  

    Then there is the DAC8830, which I like because is shows zero code error to be quite small at 1LSB and then INL/DNL is just fine.  We don't need the full 16-bits, 12-bits is good enough.  If you have any other suggestions on DACs which have good absolute accuracy (<1%, from code 0,1,2,3... up to FSR), please let me know.

    Thanks for all the help!

    Erik

  • Erik,

    You might take a look at DAC7811 as an MDAC candidate for this design since you're looking for a 12-bit solution. It also has some nice benefits in offering IOUT1 and IOUT2 output pins. I published two reference designs around some of the unique capabilities of the DAC7811 a few years back:

    http://www.ti.com/tool/TIPD159

    http://www.ti.com/tool/TIPD157

    Concerning the DAC8801 it is saying that the absolute value of the current output will vary +/-20%. When using the device with the transimpedance stage at the output to convert the current output into a voltage using the internal feedback resistor, this does not mean +/-20% gain error. Basically the way trimming accuracy works on such products is more with respect to ratiometric matching of the resistor values as opposed to absolute value. So while the absolute value, and therefore the magnitude of current at the output, will vary +/-20% - the gain error is still aligned to +/-4mV maximum and +/-1mV typical.

  • Hi Erik,

    At low currents, offset voltages will dominate, and at high currents, gain errors will dominate (mostly resistor tolerance, so buy much better than 1%).  But there are some additional gotchas with the currents, the gain of the diff amp, etc.  A home grown diff amp has some challenges due to resistor tolerances, input impedance, CMRR, etc. If you'd like to take this offline so that you can share sensitive schematics, let me know.  I have a lot of experience with voltage controlled current sources and can likely be of assistance.  

    Thanks,
    Scott  

  • Ok, I'm still weary of those current output DACs as they don't specify offset.  I see your reference design doc TIPD159.  Can you walk me through how the TUE error of %FSR is calculated in figure 1?  I understand how TUE is calculated traditionally when you have overall gain, offset, etc - its an RMS sum.  I've read TI's appnote on that.  But how specifically did you calculate TUE at each code in figure 1?  For example if the first code should be 5uA and you get 6uA, what is the calculated TUE in terms of %FSR?  I just don't understand why we don't just use a regular old "% error" when we want to zoom out and measure total accuracy error in a DAC.  For example: (6uA-5uA)/(5uA)*100 = +20%.

    And why is the DAC8830 so good?  Only 1LSB of zero code offset??  That's amazing, I can't find anything else that good.

    Thanks for the help,

    Erik

  • Erik,

    The devices do not specify an offset error because there is no offset error - just some leakage current through the R-2R switches which is typically defined at zero-code when all of the switches should be connected to GND. With no amplifier there is no Vos parameter which would impact the linear region of operation or output voltage swing to rail limitation near either positive or negative rails.

    I see your point concerning the comment of overall accuracy vs the target as opposed to an analysis against %FSR and I don't really have a good answer for you. Most of our customers define this in terms of %FSR, therefore we provide the data in the conventional format. The largest error in absolute magnitude will occur at full-scale, so perhaps this is where the convention was derived from. The percentage may be larger at lower codes, but it may be sub millivolts of error versus several millivolts at full-scale.