Other Parts Discussed in Thread: ADC12DJ3200EVM, ADC12J4000EVM
Dear TI experts
I'm trying to build the connection between ADC12J1600 and KC705 using the JESD204B protocol. As for now, the data can be sampled by ADC and captured on HSDC Pro software.
I'm trying to send the data onto FPGA, I've downloaded a JESD204B demo project on board. But it looks like the transceiver is in PMA loopback mood, so the receiver's ILA is not capturing the sampled data from outside but a pre-generated sine wave that is attached to this project.
Could you please take a review of this demo project and show me the right way to set it up, so that the FPGA can receive the sampled data by ADC?
Here is the specification of my ADC12J1600's setup: Decimated by 4, DDR=1, P54=1, LMF=422.
Huge appreciation for your help in advance.
Best,
Haotian