ADS1274: VCOM OUTPUT

Hello Eduardo,

Welcome to the TI E2E Community.

VCOM is a high impedance output and must be buffered with an external amplifier if driving a load.  However, you should be able to measure this voltage with a DMM and not cause the problem you describe.  This may be an ESD event causing the device to latch-up and requiring a power cycle to clear.

Does this issue occur on multiple devices, or just a single ADC?  This could be due to previous ESD damage, making the pin more sensitive.

Regards,
Keith Nicholas
Precision ADC Applications

Hi Keith,

I've got VCOM going to a buffer. Even when I measure the output of the buffer, my voltage decreases slowly. It's a new board and I'm testing in an ESD controlled environment - though I could try another board just to make sure it's not the IC.

So to answer your question, yes it's just one ADC. Is there a VCOM power off feature maybe? It just seems odd that it would come back up after a power cycle.

Regards,

Eduardo 

Hello Eduardo,

There is no VCOM power feature.  I can only think of two possibilities other than the output is getting loaded down.  Either the ADS1274 is damaged, or AVDD is not stable (VCOM is the output of a voltage divider connected to AVDD, if AVDD is not stable, then VCOM will not be stable).

Regards,
Keith

Hi Keith,

No luck in trying a different board/IC. If I didn't mention previously, we are probing this while the ADC is not running, just powered. I did notice that whenever I turn off IOVDD, my VCOM reference comes back up and remains constant. Only when I turn IOVDD back on does my VCOM reference immediately go away. This leads me to believe that the VCOM reference output is not just a mere resistor divided voltage from AVDD. Would you be able to give me more information on the inner workings of VCOM?

Thank you,

Eduardo 

Hi Eduardo,

I need to check with the designer to better understand the VCOM pin.

It is possible that this pin is controlled through an internal switch, which always defaults ON during power-up.  However, if this is how it functions, then a proper power-up reset would need to occur.

Can you verify that you are meeting the power supply sequence requirements in Figure 84 of the datasheet and also asserting the SYNC pin after device power-on when data first appear?

Thank you.

Regards,
Keith 

Hi Keith,

I verified the power sequence from the datasheet and toggled the SYNC pin as well as the CLK pin - had no results. What I did find was that at least one nPWDN must be pulled high in order for the VCOM voltage to come back. As soon as all nPWDN pins are pulled low some internal switch must turn off allowing me to discharge the external cap. Could you please confirm that this is the case and I'm not just seeing something out of the ordinary?

Thank you,

Eduardo