TSW14J56EVM: TSW14J56EVM

Hi Jim,

One other question concerning the ADC board - ADS54J40EVM:

1. Does the input transformer circuit is matched to 50 ohm source input?

2. We want to synchronize the ADC with 10 Mhz signal source. When doing it is the signal-in, that also synchronized to the 10 Mhz ref clock

    will be synchronize to the ADC clock of 943.04 Mhz. (see attached drawing)

3. When using the trigger in ( J13 on TSW14J56) what will be the jitter of the signal out (the sampled signal in by the ADC) between trigger in pulses)

Giora,

1. Yes, 50 Ohms.

2. Is this a question? I cannot tell.

3. See the attached documents4137.TSW14j56_MC firmware design document.pdf which explains how the trigger function works. This is a logic output from an Altera 5AGZME1EZH29C3N Arria V device. You would have to either consult the data sheet for this info or measure the jitter yourself. This is something we have not measured.

Regards,

Jim

TSW14J56revD Trigger.docx

Jim,

Thanks.

In question 3 I meant:

If the signal input to the adc board (J2) and the trigger input to J13 (EXT _TRIG) on TSW15J56 are all synchronized to the 10 Mhz ref clock (J6 on adc board)

Giving a single shot trigger on the EXT_TRIG and capture the signal input - let say that the signal input is a rectangular pulse - and on the PC GUI

the pulse is started at clock 1000.

Now a second trigger is given and we capture again the signal input.( It is the same signal as the first one with the same relations between the signal input the trigger and the 10 Mhz ref clock.) My question is the captured rectangular pulse will also start at clock 1000 on the PC GUI or will it has a jitter?

Regards,

Giora

Giora,

If the trigger is synchronized to the 10MHz reference and an integer factor of the local multi-frame clock (LMFC), then the start should be the same for each capture.

Regards,

Jim

Jin,

Thanks.

How to make the 10 Mhz ref clock an integer factor of the LMFC clock?

Regards,

Giora

Giora,

Not the 10MHz reference, the trigger must meet this requirement. The LMFC will already be synchronized by the 10MHz. LMFC calculation attached.

Regards,

Jim

bit rate calculation.docx

Hi Jim,

Another question regarding the ADS54J40EVM board.

We are using the VCO 122.88 Mhz as the source to get the  ADC clock.

The configuration allow us to chose the 943.04 Mhz.

Can we change it say to 960 Mhz?

Giora,

The issue is not only with the VCXO but the LMK device. The LMK04828 has two internal PLL's that will not allow this range. You have to options to get this to work:

1. Change the LMK04828 to a LMK04826 and change the VCXO to 120MHz.

2. Use the LMK04828 in clock distribution mode and provide an external 960MHz.

Regards,

Jim