DAC8742H: Is there any more documentation besides the datasheet?

Hi Mike,

My colleague, Reza, will get back to you when he is back in the office, likely Monday morning.

Thanks,

Paul

Hi Mike,

The HART standard is defined by the HART foundations, so some of these terms are technical definitions based on their documentation.  For example, the HART Data Link Layer and Physical Layer specifications define the meaning of a GAP error.  We are compliant with their definition.

Having two commands collide is not a normal use-case. I think that would actually cause a bus error.  Now, if a device on the bus was continuously streaming data, then CD would stay asserted the whole time.

Thanks,

Paul

Paul,

What I am trying to figure out is how to know when I have captured an entire frame.  If I DMA the bytes from the 8742H to my micro, how do I know when the frame is complete?  Am I always guaranteed to get a transition on CD?  From looking at the HART Physical Layer Spec (#54) it shows that there can be no silence between frames but it isn't clear about whether the carrier MUST drop below the 80mV between frames (I am looking at the definition of a frame in the standard).  

I looked at the standard for the GAP error definition and here is what it says: "A gap error indicates that the transmitting device malfunctioned mid-message".  Well, that isn't very clear.  It would be helpful to know exactly what causes a GAP error on the 8742H.  Is it that there was a gap > 1 bit when it didn't expect it (mid-message).  How does the 8742H know the message is not complete (since there is no end delimiter in HART)?

Now, I am picking on GAP here, but there are several bits of status in the 8742H that aren't explained in the datasheet.  Surely someone can supply an explanation of what causes them.

Mike.

Hello Mike,

The HART signal is a phase continuous FSK signal with 1200Hz and 2200Hz representing 'mark' and 'space' frequencies corresponding to bits 1 and 0 respectively. Like Paul mentioned earlier, the DAC8742H was designed to be HART compliant as defined by the physical layer and data link layer and assumes understanding of terms as defined by the Hart Communication Foundation. I will attempt to answer your questions though.

A gap is defined by the timing between two valid characters/ frames. A gap error is reported when this timing exceeds 1 full character length (i.e. 11 bits).

CD is triggered after a valid carrier is detected which is defined by a maximum of 6 bit times. CD doesn't go low between valid characters. The the device expects 1 start bit, 8 data bits, 1 odd parity bit, and 1 stop bit or an 8O1 UART character format. The 'delimiter' is the combination of the start & stop bits of the character being sent.

I hope this clarifies it for you.

Regards,

Reza

Well, sorry but that doesn't help at all.  I really need less HART education and more details on exactly what the 8742H does.  You didn't answer any of my questions in the last post I sent...

Mike.

Hello Mike,

Below are your questions as I understand them and my corresponding responses. Please let me know if I understood the question right.

Q1. What I am trying to figure out is how to know when I have captured an entire frame.  If I DMA the bytes from the 8742H to my micro, how do I know when the frame is complete?  Am I always guaranteed to get a transition on CD? 

A logic low on the RTS pin enables the DAC8742H HART modem for transmission. In this mode, the DAC8742H simply passes through the data on UART_IN to MOD_OUT at 1200 baud with no gaps. When a valid carrier is detected, (MOD_IN signal between 80mV & 120mV), CD goes logic high and starts demodulating at 1200 baud. Again, the DAC8742H is simply directly converting from HART to UART_OUT. CD only returns to logic low if the signal on MOD_IN drops below 80mV. 

When interfacing the HART modem via the UART interface, the device can be thought of as a simple UART-to-HART or HART-to-UART direct feedthrough converter

Q2. It would be helpful to know exactly what causes a GAP error on the 8742H.  Is it that there was a gap > 1 bit when it didn't expect it (mid-message).  How does the 8742H know the message is not complete (since there is no end delimiter in HART)?

The DAC8742H reports gap errors in the HART frame, it doesn't cause the gap error. When the DAC8742H is demodulating in HART mode, the device expects 1 start bit, 8 data bits, 1 odd parity bit, and 1 stop bit or an 8O1 UART character format. If the gap between characters exceeds one character length, a gap error is reported

Do let me know if I understood your questions correctly or please explain further so I can better respond to them. Thanks.

Regards,

Reza

OK, for Q1, I guess I wasn't clear enough.  We are not using the UART interface, we are using the SPI interface.  So you are saying that I can rely on CD as a method of knowing when the frame is finished?  Are you also saying that we are guaranteed that there will always be a point at which the carrier drops below 80mV between packets?  That wasn't clear to me from the standard - see my post on the 27th - as it clearly states that there is no requirement for silence between packets.

For Q2, how does the 8742H know it is a Gap and not the end of the frame?

Mike.

Hello Mike,

I had also assumed you were interfacing UART with HART. Sorry about that. My responses below are for SPI interfaced HART operation

Q1:  So you are saying that I can rely on CD as a method of knowing when the frame is finished?

Yes, when the frame is finished, the HART signal is essentially no longer present, hence the signal on MOD_IN pin drops below 80 mV causing CD to change to logic low. CD bit can be read back from the MODEM STATUS register to indicate the presence of or lack of a carrier.

Q2:  Are you also saying that we are guaranteed that there will always be a point at which the carrier drops below 80mV between packets?

Between packets the carrier does not need to drop below 80mV. So long as a time between valid characters/ packets is less than 1 character length, then a gap error will not be reported as a consequence. 

Q3: How does the 8742H know it is a Gap and not the end of the frame

When the timing between valid characters or frames exceeds 1 character length a gap error is reported regardless. If the frame is complete from the transmitting HART device, RTS of the transmitting device can be set to turn off the HART signal, and this would turn off the CD bit of the DAC8742H. This way the DAC8742H does not expect another character and would not report a gap error as a result.

Reza,

Thank you for the reply.  I have one more thing in this topic to clear up.

From looking at the HART Physical Layer Spec (#54) it shows that there can be no silence between frames but it isn't clear about whether the carrier MUST drop below the 80mV between frames (I am looking at the definition of a frame in the standard):

So this information made me question whether CD would always transition between frames.

Mike.

Reza,

I plan on using the DAC8742H in our product.  I am concerned about the plethora of devices out there that we would have to support as a Remote IO device.  Based on your explanation, if I was using CD to determine when to check the DMA buffer, there might be multiple HART frames there because there was no silence between the frames.

Mike.

Hello Mike,

Is your system a multi-drop HART system? If so, how many masters are in the system? Like you said, the physical layer spec does allow for overlapping carriers however the timing between different carriers is defined in the data link layer specification and any HART compliant stack should be able to tell the end of one frame and the start of the next. The start & stop bits of the characters of the HART frame demarcate the individual message frames.

Do you already have a HART compliant stack to use along side the modem?

Regards,

Reza

No we don't plan on supporting multi-drop.  No we don't have a stack yet.

Mike.