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ADS8681: Timing of acquiring the analog input signal

Part Number: ADS8681

Hi,

When does this device acquire the analog input signal?
Is it time to switch mode from ACQ to CONV?
In the timing requirement diagram, is it at the rising edge of the CONVST/CS pin?

Best regards,
Yuto Sakai

  • Hi Yuto,

    The acquisition starts when the ADC mode is moving from the conversion phase to the acquisition phase. In your timing diagram,it's the end of tconv and the beginning of tacq. The moment you highlighted indicates that the conversion starts.

    Thanks&Regards,

    Dale

  • Hi Dale-san,

    Thank you for your reply.

    When is the acquired analog input signal used in the conversion mode of the device?
    I understand the timing of the falling edge of CONVST/CS (at the beginning of the tacq period).
    Is it correct?

    Best regards,
    Yuto Sakai

  • Hi Yuto-san,

    No, the analog signal acquired in previous cycle is used in conversion period of current cycle which starts at the rising edge of CONVST/CS you highlighted.

    When acquisition phase starts (rising edge of ADCST and the end of tconv and the beginning of tacq), the internal switch S1 is closed, the internal sampling-hold capacitor will be charged, see screenshot below:

    When conversion phase starts (at the rising edge of CONVST/CS), the internal switch S1 is open, the internal circuitry will start conversion, see screenshot below:

    These detailed information can be found in SAR Operation Overview - SAR ADC Input Driver Design of TI Precision Labs - ADC.

    Thanks&regards,

    Dale