This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS54J64EVM: Running SPI thru FMC / how does U3 CPLD work?

Part Number: ADS54J64EVM

I'd like to run the EVM with a custom FPGA board that has an HPC I/F. I don't need to run the HSDC Pro software, we're doing all our own firmware & software

On page 7 of the EVM schematic labeled CPLD, on U3-2 there is jumper JP3 that suggests that one could chose to run the LMK & ADC SPI I/Fs thru

the FMC interface. It looks like if I short 1-2 on JP3 it will select for FMC control (the Appendix A of SBAU290 says this config is reserved).

If this would work, could you provide some description of the signals to U3 on page 7? Or the logic equations used to program the CPLD, that would be great!

Mike