This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS7883:

Intellectual 1875 points

Replies: 3

Views: 88

Part Number: ADS7883

HI,

For the ADS7883 power-down mode, is there any way for the device to enter power-down mode other than the following:

  • From the SPI interface based on:  “The device enters power-down mode if CS goes high anytime after the 2nd SCLK falling edge to before the 10th SCLK falling edge.”
  • Low voltage on VDD

 I ask because we think the device is going into power-down unexpectedly.  On power-up, we perform an initial conversion to bring the device out of the power-down state.  After that, we only perform full SPI read transactions with the CS low for all 16 bit times.   

Our SPI read transactions are not at a fixed period, meaning there can be milliseconds to a second between read transactions / conversions.

Thanks,

HSG 

3 Replies

  • Hello,

    Looking at the datasheet, it does not seem there is another method to enter Power down mode, but I will discuss with the design team to confirm this.

    Why do you suspect the device is entering power down mode?

    On the initial conversion, on power up, what is the output data? is this the expected output?

    To check if the device is in power down mode, is using DC inputs to confirm the sample data.

    Use a known initial DC input when device is functioning normal, sample data as per usual and confirm expected output.

    When suspected the device has gone into Power Down mode, change the DC input to something significantly different.

    Then, when you are powering it up, the initial conversion will either be invalid data confirming it is power down mode, or the new DC input confirming it did not go into power down mode.

    I suggest using an oscilloscope to probe the communication lines of the ADC to confirm timing and firmware.

    Regards

    Cynthia

  • In reply to Cynthia:

    I have this same ADS7883SBDBV question as a result from an issue I see in my design.

    My circuit description:

    +3.3V VDD

    Input is a pulsed square wave of varying voltage, 300us pulse width.

    The ADS7883SBDBV is used to measure the voltage of these pulses. I often get accurate measurements. Intermittently, I will get erroneous measurements, but if I make two measurements on the same pulse the second one is always very accurate. Only the first measurement will intermittently be inaccurate. This issue exists only when the input voltage is on the low end.

    Bad Example:

    A pulsed voltage input that should result in a decimal 725 may read decimal 680 on the first read but 725 on the second read of the same pulse.

    Higher Voltage Good Example:

    A pulsed voltage input that should result in a decimal 1200 will always read decimal 1200 on the first and second read of the pulse.

    The input voltage at which the error occurs appears to be temperature sensitive.

    The reason I suspect the part is going into a power down state because whenever I get an erroneous reading, the reading that immediately follows is always accurate. I see that when powered down, the first reading is not expected to be correct.

    Question 1: Can you explain what we should expect to see in the measurement data on the first read after coming out of power down.  Less accurate measurement?  Random Noise? Zero? Other?

    Question 2: Is there a timeout where after a certain amount of time not making any measurement, and near zero input voltage, the accuracy of measuring a low voltage pulsed input is degraded.

  • In reply to Matthew Nigbor:

    This had been taken offline

    Regards

    Cynthia

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.