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Part Number: ADS1256
I generated a 2Hz 142mV pk-pk voltage (with min value = 0V and max value = 142mV) using a function generator (SWF-7000). I'm using a voltage divider with two 10k resistors to divide the signal by 2 so the the new signal should be 71mV pk-pk voltage (with min value = 0V and max value = 71mV). I'm sampling the 71mV pk-pk with an ADS1256 with a sampling rate of 500SPS using the differential mode and VREF = 2.5V. According to Table 8. Full-Scale Input Voltage vs PGA Setting found in the data sheet, I should be able to clearly see the signal using a PGA of 16, 32, or 64 since the signal amplitude is lower than 78.125 mV. However, whenever I was using those PGA settings (16,32,64) I kept getting maximum ADC value which 8388607 or 0x7FFFFF. And weirdly, I could clearly see (sample) the signal using the PGA = 1,2 or 4. For PGA = 8 I only partially saw the signal since some values were 8388607 or 0x7FFFFF. I'm using a Raspberry PI 4 to communicate with the ADS1256 and the SPI speed is 976000. I'm not sure what's the real meaning of the full-scale input voltage; it says I should be able to read a +/-78mV or (0 to 78mV) using a PGA = 64 but I can't read +/-71mV(0 to 71mV). I'm also not sure why I get an aliased signal when using Date Rate from 10SPS to 50SPS. 10SPS to 50SPS clearly satisfies Nyquist's sampling theorem since the frequency of the signal is only 2 Hz.
Can you confirm if you are using the ADS1256 with the buffer on or off?
Also, what MCLK rate are you using? 7.68MHz?
And what is the common-mode signal coming out of the function generator relative to AGND? Is the 0V to 142mV signal swinging around 71mV then? That is, 71mV above AGND? If referenced to some other potential, you could be applying a much larger absolute voltage to your ADC's inputs than expected.
I would expect your setup as described to look something like the image and plot below. Please update any incorrect assumptions. Or better yet, please post a schematic so we can review for any issues.
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In reply to Bryan Lizon86:
The Clock frequency for the ADS1256 is 7.68MHz and I'm using it with buffer off
The common-mode signal coming from the function generator is how you've shown in the image ( 0V to 142mV signal swinging around 71mV ); I added an offset so that the minimum voltage is 0V. I'm not sure what you mean by the 71mV above AGND. I'm actually feeding (71/2)mV to the ADS1256 as you've shown. The ground the function generator is connected to AIN1 and the positive signal is connected to AIN0 as in the image. What does AVSS represent here? Because the ADS1256 is part of the "High -Precision ADS1256 24-Bit 8 Channel ADC board" https://www.amazon.com/High-precision-ADS1256-Channel-Digital-Converter/dp/B072C2LY17. The GND pin of the board (ADS1256) is connected to the ground pin of the raspberry pi. I'm not connecting the ground terminal of the signal to AVSS.
Here's my schematic
In reply to user6152136:
I was unable to find a schematic for the board you are using, so I cannot comment on any challenges it may introduce into your system. Please also note that this is a 3rd-party board that TI does not support, so if there are problems with the design, layout, etc., you will have to contact the manufacturer.
With the buffer off, the ADS1256 input impedance is very low - see the image and table below. Having a 10k resistor in parallel with the ADS1256 input impedance, especially at the higher gains, will cause unwanted behavior.
Try enabling the buffer. Also note that the ADS1256's absolute input voltage is 0V with the buffer enabled, so you may have to adjust your inputs so they are not at GND. Otherwise, any variation in the supplies, etc. might cause the input to swing outside of the ADS1256's usable range.
Also, AVSS should be AGND in the image I sent in a previous post. This was referenced correctly in the text of the post, but written incorrectly in the image. Many ADCs use AVSS instead of AGND, and this image was originally created for a different product.
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