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Part Number: DAC37J82
We use DAC device with 4 lanes 0-3 , DAC A/B (C/D are not used).
After configuring the device we poll register 0x6c to see if DAC function as expected(read is after write to clear).
Value of register 0x6c varies after every configuration : sometimes value is 0x05 and sometimes 0x07.
Bit 1 is defined by Datasheet as reserved.
By the way regs 0x64-0x67 are all zeros.
Does it point on a hidden problem or an issue that needs attention ?
If YES , where should be look for it ?
After the DAC has been initialized and you are getting a valid output, write 0x0000 to this register to clear it then do a read. If you are not using the DAC PLL, bit 0 may fluctuate. If bit 3 does have a value of "1", this is an issue. Since you are only using lanes 0-3, bit 2 is a don't care and may fluctuate as well.
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In reply to jim s:
Thanks for the fast answer.
Kindly refer to Reg 0x6c, bit 1 (Bits 0,2,3 are well documented in datasheet).
That bit changes between different programming of the same configuration, although ox6c was written with 0x0 before.
In reply to tamir meoded:
What you are seeing is to be expected if not using the DAC PLL. Bit 1 is reserved and not reporting any type of valid status.
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