First and foremost I would like to appreciate your time and patience in responding to the issues posted here, I personally learned a lot by just reading your responses.I previously used ADC1232 a few years back in a light-detection module (bad choice of ADC?), but to be honest, I never had a chance to go through the datasheet properly and exploit all the functionalities provided by this ADC till now that I'm re-visiting this module trying to write a python-based library for it. I'm writing this class for again, a light-detection module and I'm using RPi or ESP32 as the microcontroller to communicate and control the ADC.
As a quick description of the wirings: AVDD, DVDD and REFP are wired to 3.3V pin of the MCU and DGND, CLKIN, REFN, AGND, XTAL1/XTAL are wired to the GND pin; CAPS are bridged via a 0.1uF ceramic capacitor, DRDY/DOUT and SCLK are connected to the MISO and SCLK pins and the rest of the digital pins were all connected to previously assigned GPIO pins...now here's the issue, my understanding is supplying REFP with 3.3V while REFN is grounded should provide a FSR of 0.5*VREF/gain for the input range, which with the gain=1 will be 0-1.65V and with the gain=2 0-0.825V etc, and if I'm inputting 1.65V at the gain=1 then I should be getting 7FFFFFh (full-scale positive output) from the MCU in the output (and for the gain=2, the maximum input voltage will be 0.825 V while the output will still be 7FFFFFh? am I right?)…however, inputting 1.65 V at gain=1 I’m getting three bytes [31, 255, 255] in the output which will be 2097151 in decimal and 0001 1111 1111 1111 1111 1111 in binaries. Apparently, the first 0 bit aside, I’m getting two more 0 bits in my raw data which I have no idea how to explain. Your comment is greatly appreciated.
Another issue that I have is with the offset calibration. The problem is almost all the examples (comments in the forum and ADS1232REF doc) they’re all based on load-cells and I couldn’t rationalize them for my purpose (in a light-detection module); as you suggested somewhere else, I’m sending 4 dummy bytes to initiate the calibration (with the falling edge of the 26th SCLK and with the DRDY/DOUT already pulled high with the 25th SCLK pulse), then I’m waiting for the DRDY/DOUT to go Low, indicating the calibration is over; I’m monitoring this process by polling using two other GPIO pins also attached to DRDY/DOUT and SLCK...I’m not seeing any significant changes in my output signal though. Should I run the calibration cycle with an almost 0 V input signal (in other words, keeping my photo-detecting module in darkness before entering the calibration process) or am I doing this entirely wrong? I look forward to having your comments,
thanks very much, Amin
For the ADS1232 the full-scale range (FSR) is +/- 0.5Vref/Gain. For a 3.3V reference you should see +/- 0.5*3.3V or +/- 1.65V. As the output of the ADS1232 is binary 2's complement, the positive range in codes is 0 to 0x7FFFFF. I'm not sure why you are seeing something else. It is unusual to see a value without noise, so you should be seeing the low order bits toggling.
I would verify with an oscilloscope or logic analyzer that the data being read back matches what is seen on the scope plots.
Also, make sure that you read the conversion result completely between end of conversions otherwise the data may become corrupt if you attempt to read during an update period.
Lastly, you have not stated the settings of the input selection, gain and temp pins. These pins cannot float.
As to the calibration, the ADS1232 uses a self-offset calibration which places an internal short to the ADC inputs bypassing the input mux. The self-calibration adjusts offset calibration only.
One other thing I should mention and that is to verify that the part is actually the ADS1232 and not some other similar device variant such as the ADS1230, ADS1231, ADS1130 or ADS1131.
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