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AMC7834: AVss Alarm detected

Marks Greulich
Intellectual 530 points
Part Number: AMC7834

Hi there,

got some trouble where I got sometimes an alarmout caused by AVss alarm. I want to understand it a bit more what perhaps helps so solve our problems. 

  • Threshold is -3.8V to -4.4V. What does it exactly mean in terms of time durations? How long needs my AVss (my setup uses -5V) over that threshold of -4.4V...-3.8V to be? nano, mikro, milli...seconds? 
  • So it could be that the AVss itself is over that threshold or its reference right?
  • The reference is what exactly? AGNDx?
  • Shouldnt I see something with the oscilloscope between AVss and GND (AGND and DGND connected together in my design) when the AMC is claming about AVss alarm?

I cannot measure something bad on the AVss pin but perhaps I`m searching in the wrong time scale. Would be interesting if also a short event like a Nanosecond would be enough to trigger the AVss alarm. 


Thanks and cheers,

Markus

  • 0
    TI__Guru 52663 points

    Hi Markus,

    It is difficult to say the time duration.  My understanding is that this alarm is not polled at a specific rate, but rather has a comparator output with some hysteresis.  The AVSS pin itself is the input for the detection circuit, so it should have some decoupling on the pin which would remove most high-frequency glitches.  I would expect the alarm to be triggered with just a few microseconds of a violation.

    The threshold is not dictated by a device reference, rather a lower accuracy component that is integrated into the threshold detect circuit.

    It is possible you could catch the glitch on a scope if it is correctly configured.  I would start with 1µ/division.  You should also make sure if you clear the alarm it can be asserted again.  I have seen some power supply outputs have a glitch during startup, which might cause this alarm.

    Thanks,

    Paul

  • 0 in reply to Paul_Frost
    Intellectual 530 points

    Hi Paul,

    as always thanks for your answer! 

    The last sentence is getting insteresting. I have an LDO before the Vss-Pin to supply the -5V. 

    We had today a discussion what happens here when our devices crashed. Let me explain it a bit: Some AMCs are suppliing several transistors with its bipolar DACs. Our devices are FETs which needs something between -5 and 0V to get a certain current on the drain high side. So normally my SW sets the DACs to a certain gate voltage and riging it up to get the drain current. 

    At a certain value of the drain currents the drain power supply of the devices got into current limitation or sometimes if we are lucky one of the AMCs shows as the Vss alarm. So I actually cant say what happens exactly. Is the -5V supply causing trouble? Is the GND running away etc.

    To understand the AMC a bit more:

    --> Lets say our devices supplied by your DACs is consuming more current then u have defined (>45mA I guess) what happens beyond that point? Lets say there is a short. There the AMC is not able to hold the voltage/clamping voltage of -5V right? Or is there a current limitation at that bip. DACs which could avoid that a 0R resistor collapses the DAC-Voltage?

    --> What happens if the Vss Alarm was detected or Vss reaches the defined thershold levels? What does that mean for the DAC-outputvoltage if the Vss=-5V is changing? Lets say Vss=-5V and DAC-Voltage = -3V. Current lower then 15mA. Everything fine. What happens if Vss=-4V or over threshold -3.8V with the DAC-Voltage=-3V? Is the -3V then more positive e.g. only -2.xVolts only? 



    Cheers,
    Markus

  • 0 in reply to Marks Greulich
    TI__Guru 52663 points

    It is possible for some GaN FETs to cause the DACs to sink current when the FET is near saturation.  Generally, a DAC sinking current (current flowing into the DAC) forces the value to rise.  That condition will also require the VSS supply to sink the current as well.  If your LDO cannot sink that current, the supply might rise.  

    When the sink current exceeds our short-circuit current limit, the output will clamp to the rail, in this case, VCC.  For this reason, we recommend that you monitor the DAC output with the internal ADC.  When VSS collapses, the AMC7834 will assert the PA_ON signal, which can be used to disable the VDRAIN source.

  • 0 in reply to Paul_Frost
    Intellectual 530 points

    Hi Paul,

    does it clamp to VCC or VSS when current exceeds the short circuit current limit? Or for sinking current exceed = VCC clamping and for sourcing current exceed = VSS exceed?



    BR,
    Markus

  • 0 in reply to Marks Greulich
    Intellectual 530 points

    I had a bad FET on one of the DACs and an external supply for the VSS (-5V) and VDD/VCC (+5V). I can see there 50mA (static) and measuring there around 0V at DAC-output. The 2nd DAC for that DAC-pair is fine and could hold the voltage. 



  • 0 in reply to Marks Greulich
    TI__Guru 52663 points

    That's good to hear.  Let me know if you have any more questions!

  • 0 in reply to Marks Greulich
    Intellectual 530 points

    Thats still open for me :-) With the 50mV and 0V clamping I wanted to say...I dont understand what happens if the short current exceeds. VSS, VCC, 0V clamping...? :-)

  • 0 in reply to Marks Greulich
    TI__Guru 52663 points

    The output would clamp to the VSS rail if sourcing current and VCC rail if sinking current (current flowing into the output pin).

    Does that answer your question?

  • 0 in reply to Paul_Frost
    Intellectual 530 points

    Hi Paul,

    in principle yes - but I dont get why the voltage then drops down to around 0V when the current exceeds the limit. 

    We changed the VSS to an external power supply with -5V and the reading was 50mA. 

    BR,
    Markus

  • 0 in reply to Marks Greulich
    TI__Guru 52663 points

    Hi Mark, 

    Short-circuit limits are implemented to protect the output stage of the amplifier.  There is a pretty good explanation of the short circuit limit of amplifiers in our precision lab series.

    I recommend you take a look at that.

    Thanks,

    Paul