Other Parts Discussed in Thread: LMK00304
Dear Technical Support Team,
A signal that was not satisfied with the spec was input to the SYSREF.
Please give me some advice.
<Situation>
The HCSL signal from LMK00304 is input to SYSREF.
Here, I chose HCSL because I wanted to input DC.
It seems that HCSL is generally terminated by using 50Ω between the damping resistor and GND outside the IC.
However, because the SYSREF pin has an internal termination resistor (connected to GND with 55Ω),
It was designed by using it instead of the external termination resistor and omitting the external termination resistor.
However, in the initial setting of the internal termination resistor of the ADC, a terminating resistor of the type that connects the P / N pair with 110Ω is selected.
There is no path to GND,
Before setting the ADC, a signal with a voltage level of 2V or higher was input to the SYSREF of the ADC.
This voltage level is unacceptable because the ADC SYSREF has an absolute maximum rating of 1.6V.
<Solution>
We are considering the following ways.
- Set CLKOUT_TYPE of LMK00304 to Hi-Z until the ADC register setting is completed.
- Install an external pull-down resistor. (To avoid over-rating during Hi-Z)
<Questions and concerns>
I would like to ask the following two points.
①Since the internal resistance of the ADC cannot be disabled
I chose a solution like the one above,
Is there any other good way?
②How is the register value appropriate for the pull-down resistor installed externally?
We would like to use a large resistor of 1kΩ or more as much as possible.
To avoid exceeding the rating during indefinite conditions
We do not consider no implementation.
Best Regards,
ttd
