Other Parts Discussed in Thread: ADC12DJ3200, , TSW14J57EVM
I am using a ADC12DJ3200EVM w/ internal clock coupled with a KCU105 development board. I would like to capture data with High Speed Data Converter Pro v5.00 with the ADC Output Data Rate at values lower than 3.2 GHz (like 1.6GHz), but I am getting DDR Time Out errors whenever I attempt to reduce the sampling rate. Right now, I am using the ADC12DJ3200 GUI to set the ADC clock to 800 MHz, reprogram the KCU105, and then use the HSDC Pro tool to capture at 1.6 GHz with JMODE0 selected. When I try similar setups for higher sampling rates (e.g. HSDC Pro set to 3.2 GHz, ADC12DJ3200 GUI at 1.6 GHz), this seems to work correctly. Any ideas on why I am getting the DDR Time Out errors?
Thanks,
Anthony